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| datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100
datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 datasheet product specification 1/3.2" color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology OV8825 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 00 copyright ?2012 omnivision technologies, inc. all rights reserved. this document is provided ?as is? with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any wa rranty otherwise arising out of any proposal, specification, or sample. omnivision technologies, inc. and all its af filiates disclaim all liab ility, including liability for infringement of any propri etary rights, relating to the use of information in this document. no license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. the information contained in this doc ument is considered proprietary to om nivision technologies, inc. and all its affiliates. this information may be dist ributed to individuals or organizations authorized by omnivision technologies, inc. to receive said information. individuals and/or organizat ions are not allowed to re-distribute said information. trademark information omnivision and the omnivision logo are registered trademarks of omnivision technologies, inc. omnibsi+ is a trademark of omnivision technologies, inc. all other trademarks used herein are the property of their respective owners. to learn more about omnivision te chnologies, visit www.ovt.com. omnivision technologies is publicly traded on nasdaq under the symbol ovti. color cmos 8 megapixel (3264 x 2448) image sensor with omnibsi+? technology datasheet (cob) product specification version 2.0 may 2012 05.09.2012 product specification proprie tary to omnivision technologies i ordering information ? ov08825-g04a (color, chip probing, 200 m backgrinding, reconstructed wafer) ov08825-e68a (color, lead-free) 68-pin csp4 00 applications ? cellular phones ? digital still cameras (dsc) ? digital video camcorders (dvc) 00 features ? automatic black level calibration (ablc) ? programmable controls for frame rate, mirror and flip, cropping, windowing, and scaling ? image quality controls: lens correction and defective pixel canceling ? support for output formats: 10-bit raw rgb (mipi) ? support for horizontal and vertical subsampling ? support for images sizes: 8 mpixel, eis1080p, 1080p, eis720p, eisq 1080p, q1080p, eisvga, vga, qvga, etc. ? support 2x2 binning ? standard serial sccb interface ? mipi serial output interface ? 256 bytes embedded one-time programmable (otp) memory for part identification, etc. ? on-chip phase lock loop (pll) ? programmable i/o drive capability ? built-in 1.5v regulator for core 00 key specifications (typical) ? active array size: 3296 x 2460 ? power supply: core: 1.5vdc 5% (internal regulator optional) analog: 2.6 ~ 3.0v i/o: 1.7 ~ 3.0v ? power requirements: active: 160ma (358 mw) standby: 30a ? temperature range: operating: -30c to 70c junction temperature (see table 8-2 ) stable image: 0c to 50c junction temperature (see table 8-2 ) ? output formats: 10-bit rgb raw ? lens size: 1/3.2" ? lens chief ray angle: 27 non-linear ? input clock frequency: 6~27 mhz ? max s/n ratio: 35.7 db ? dynamic range: 70.45 db @ 8x gain ? maximum image transfer rate: 8mpixel: 24 fps (see table 2-1 ) eis1080p: 30 fps (see table 2-1 ) eis720p: 60 fps (see table 2-1 ) ? sensitivity: 725 mv/lux-sec ? scan mode: progressive ? maximum exposure interval: 2480 x t row ? pixel size: 1.4 m x 1.4 m ? dark current: 8 mv/s @ 50c junction temperature ? image area: 4614 m x 3444 m ? packagedie dimensions: 6350 m x 6750 m color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies iii 00 table of contents 1 signal descriptions 1-1 2 system level description 2-1 2.1 overview 2-1 2.2 architecture 2-1 2.3 format and frame 2-3 2.4 i/o control 2-5 2.5 mipi interface 2-6 2.6 vsync timing 2-9 2.6.1 vsync modes 2-9 2.7 external interface 2-10 2.7.1 external components 2-10 2.8 power up sequence 2-10 2.8.1 power up with internal dvdd 2-10 2.8.2 power up with external dvdd source 2-11 2.9 power management 2-13 2.10 reset 2-13 2.10.1 power on reset generation 2-13 2.11 hardware and software standby 2-13 2.11.1 hardware standby 2-13 2.11.2 software standby 2-13 2.12 system clock control 2-14 2.12.1 pll configuration 2-14 2.13 serial camera contro l bus (sccb) interface 2-15 2.13.1 data transfer protocol 2-15 2.13.2 message format 2-15 2.13.3 read / write operation 2-15 2.13.4 sccb timing 2-18 2.13.5 group write 2-19 3 block level description 3-1 3.1 pixel array structure 3-1 3.2 subsampling 3-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4 image sensor core digital functions 4-1 4.1 mirror and flip 4-1 4.2 image windowing 4-2 4.3 test pattern 4-3 4.3.1 general color bar 4-3 4.3.2 test pattern i and ii (16 bar) 4-4 4.3.3 test pattern iii and iv (horizontal fading) 4-4 4.4 black level calibration (blc) 4-5 4.5 one time programmable (otp) memory 4-6 4.5.1 otp program 4-6 4.5.2 otp read 4-7 4.6 temperature sensor 4-7 4.7 context switching 4-8 4.7.1 context switching time 4-8 4.7.2 context switching control 4-12 4.8 illumination control 4-12 4.9 vcm driver 4-14 4.9.1 output current mode 4-15 4.10 strobe flash and frame exposure 4-18 4.10.1 strobe flash control 4-18 4.10.2 frame exposure (frex) mode 4-20 5 image sensor processo r digital functions 5-1 5.1 isp general controls 5-1 5.2 lenc 5-3 5.3 defect pixel ca ncellation (dpc) 5-7 5.4 scalar 5-8 5.5 mwb 5-11 5.6 gain and exposure control 5-12 5.7 average (avg) 5-14 6 system control 6-1 6.1 mobile industry processor interface (mipi) 6-5 05.09.2012 product specification proprie tary to omnivision technologies v 7 register tables 7-1 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] 7-1 7.2 sccb control [0x3100 ~ 0x3106] 7-5 7.3 context switching [0x3200 ~ 0x320f] 7-6 7.4 mwb control [0x3400 ~ 0x3406] 7-8 7.5 manual aec/agc [0x3500 ~ 0x350f] 7-9 7.6 analog and vcm control [0x3600 ~ 0x361e] 7-10 7.7 sensor control [0x3700 ~ 0x3712] 7-13 7.8 timing control [0x3800 ~ 0x382a] 7-14 7.9 strobe control [0x3b00 ~ 0x3b20] 7-16 7.10 otp control [0x3d80 ~ 0x3dn] 7-18 7.11 psram [0x3f00 ~ 0x3f07] 7-18 7.12 blc control [0x4000 ~ 0x44013] 7-19 7.13 frame control [0x4200 ~ 0x4203] 7-21 7.14 format control [0x4300 ~ 0x430f] 7-21 7.15 vfifo control [0x4600 ~ 0x4604] 7-23 7.16 mipi control [0x4800 ~ 0x485f] 7-24 7.17 isp top [0x5000 ~ 0x5055] 7-33 7.18 scale control [0x5041, 0x5600 ~ 0x5608] 7-36 7.19 average control [0x5041, 0x5680 ~ 0x5688] 7-37 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 7-38 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 7-39 7.22 pre blc [0x5c00 ~ 0x5c08] 7-42 7.23 pre isp [0x5e00 ~ 0x5e11] 7-43 7.24 illumination control [0x6600 ~ 0x6611] 7-44 7.25 tpm control [0x6700 ~ 0x6721] 7-46 7.26 cadc [0x6900 ~ 0x6901] 7-46 8 operating specifications 8-1 8.1 absolute maximum ratings 8-1 8.2 functional temperature 8-1 8.3 dc characteristics 8-2 8.4 timing characteristics 8-3 8.5 vcm characteristics 8-3 9 mechanical specifications 9-1 9.1 physical specifications 9-1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10 optical specifications 10-1 10.1 sensor array center 10-1 10.2 lens chief ray angle (cra) 10-2 appendix a handling of rw devices a-1 a.1 esd /eos prevention a-1 a.2 particles and cleanl iness of environment a-1 a.3 other requirements a-1 05.09.2012 product specification proprie tary to omnivision technologies vii 00 list of figures figure 1-1 pad diagram 1-5 figure 2-1 OV8825 block diagram 2-2 figure 2-2 exposure/gain latch points for full resolution, 1080p, and quarter size 2-4 figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p 2-4 figure 2-4 exposure/gain la tch points for vga 2-5 figure 2-5 mipi timing 2-6 figure 2-6 vsync mode 1 timing 2-9 figure 2-7 vsync mode 2 timing 2-9 figure 2-8 power up timing with internal dvdd 2-11 figure 2-9 power up timing with external dvdd source 2-12 figure 2-10 OV8825 pll clock diagram 2-14 figure 2-11 message type 2-15 figure 2-12 sccb single read from random location 2-16 figure 2-13 sccb single read from current location 2-16 figure 2-14 sccb sequential re ad from random location 2-16 figure 2-15 sccb sequential re ad from current location 2-17 figure 2-16 sccb single write to random location 2-17 figure 2-17 sccb sequential wr ite to random location 2-17 figure 2-18 sccb interface timing 2-18 figure 3-1 sensor array region color filter layout 3-1 figure 3-2 example of 2x2 binning 3-2 figure 4-1 mirror and flip samples 4-1 figure 4-2 image windowing 4-2 figure 4-3 test pattern 4-3 figure 4-4 context switching wi thout sensor mode change 4-9 figure 4-5 multiple consecut ive context switching 4-9 figure 4-6 electronic rolling shutter to gl obal reset context switching example 4-10 figure 4-7 context change for global re set to electronic rolling shutter 4-10 figure 4-8 bracketed exposure context example 4-11 figure 4-9 illumination diagram 1 4-12 figure 4-10 illumina tion diagram 2 4-13 figure 4-11 vcm block diagram 4-14 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 4-12 1/4 to 3/4 scale settling time (directly jump mod e, vdd = 3.0v) 4-17 figure 4-13 xenon flash mode 4-18 figure 4-14 led 1 mode 4-19 figure 4-15 led 2 mode 4-19 figure 4-16 frex mode 1 4-20 figure 4-17 frex mode 2 4-20 figure 4-18 frex mode 1 timing diagram 4-21 figure 4-19 frex mode 2 (shutter delay = 0) timing diagram 4-22 figure 4-20 frex mode 2 (shutter delay > 0) timing diagram 4-22 figure 5-1 control points of lu minance and color channels 5-3 figure 5-2 luminance compensation level calculation 5-3 figure 5-3 scaling function 5-8 figure 9-1 die specifications 9-1 figure 10-1 sensor array center 10-1 figure 10-2 chief ray angle (cra) 10-2 05.09.2012 product specification proprie tary to omnivision technologies ix 00 list of tables table 1-1 signal descriptions 1-1 table 1-2 configuration under various conditions 1-3 table 1-3 pad symbo l and equivalent circuit 1-5 table 2-1 mipi supported frame and frame rate (using 4 la nes, 700 mbps max data rate) 2-3 table 2-2 mipi supported fo rmat and frame rate (using 2 la nes, 800 mbps max data rate) 2-3 table 2-3 i/o control registers 2-5 table 2-4 mipi timing specifications 2-7 table 2-5 vsync control registers 2-9 table 2-6 pll configurations 2-14 table 2-7 sccb interf ace timing specifications 2-18 table 2-8 sccb interface register 2-19 table 2-9 context switching control 2-19 table 3-1 binning-related registers 3-2 table 3-2 binning-related regi sters when not in sub-sampling mode 3-2 table 4-1 mirror and flip registers 4-1 table 4-2 image windowing control functions 4-2 table 4-3 general color bar selection control 4-3 table 4-4 test pattern i and ii selection control 4-4 table 4-5 test pattern iii and iv selection control 4-4 table 4-6 blc control functions 4-5 table 4-7 otp control functions 4-6 table 4-8 temperature sensor functions 4-7 table 4-9 context switching latency 4-8 table 4-10 context switching control functions 4-12 table 4-11 illumination control functions 4-13 table 4-12 vcm control functions 4-15 table 4-13 single step mode 4-16 table 4-14 multi-code step mode 4-16 table 4-15 flashlight modes 4-18 table 4-16 frex strobe control registers 4-23 table 5-1 isp general control registers 5-1 table 5-2 lenc control registers 5-4 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 5-3 dpc register 5-7 table 5-4 scalar fa ctor calculation matrix 5-9 table 5-5 scalar control registers 5-10 table 5-6 mwb control registers 5-11 table 5-7 gain/exposure control registers 5-12 table 5-8 avg control registers 5-14 table 6-1 system control registers 6-1 table 6-2 mipi registers 6-5 table 7-1 system control registers 7-1 table 7-2 sccb registers 7-5 table 7-3 context switching registers 7-6 table 7-4 mwb control registers 7-8 table 7-5 manual aec/agc registers 7-9 table 7-6 analog and vcm registers 7-10 table 7-7 sensor control registers 7-13 table 7-8 timing control registers 7-14 table 7-9 strobe control registers 7-16 table 7-10 otp control registers 7-18 table 7-11 psram registers 7-18 table 7-12 blc control registers 7-19 table 7-13 frame control registers 7-21 table 7-14 format control registers 7-21 table 7-15 vfifo control registers 7-23 table 7-16 mipi control registers 7-24 table 7-17 isp top registers 7-33 table 7-18 scale control registers 7-36 table 7-19 average control registers 7-37 table 7-20 dpc control registers 7-38 table 7-21 lenc registers 7-39 table 7-22 pre blc registers 7-42 table 7-23 pre isp registers 7-43 table 7-24 illumination control registers 7-44 table 7-25 tpm registers 7-46 table 7-26 cadc registers 7-46 table 8-1 absolute maximum ratings 8-1 05.09.2012 product specification proprie tary to omnivision technologies xi table 8-2 functional temperature 8-1 table 8-3 dc characteristics (-30c < tj < 70c) 8-2 table 8-4 timi ng characteristics 8-3 table 8-5 vcm characteristics 8-3 table 9-1 pad lo cation coordinates 9-2 table 10-1 cra versus image height plot 10-2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 1-1 1 signal descriptions table 1-1 lists the signal descr iptions and their corresponding pad numbers for the OV8825 image sensor. the die information is shown in section 9 . table 1-1 signal descriptions (sheet 1 of 3) pad number signal name pad type description default i/o status 01 siod i/o sccb data 02 vsync i/o vsync output 03 frex i/o frame exposure input / mechanical shutter output 04 shutter i/o illumination control output 05 avdd power power for analog circuit 06 agnd ground ground for analog circuit 07 strobe i/o strobe output 08 resetb input reset (active low with internal pull up transistors) depending on process condition and dovdd voltage, the pull up resistance ranges from 1m ? ~ 7m ? when it is low and ranges from 200k ? to 1m ? when it is high 09 pwdnb input power down (active low with internal pull up resistor) depending on process condition, the pull up resistance is 700k ? ~ 1.3m ? 10 tm input test mode (active high with internal pull down resistor) tie to ground although it is pulled to ground internally 11 sgnd ground ground for array 12 dvdd power power for digital circuit 13 dgnd ground ground for digital circuit 14 avdd power power for analog circuit 15 agnd ground ground for analog circuit 16 agnd ground ground for analog circuit 17 avdd power power for analog circuit 18 dgnd ground ground for digital circuit 19 dvdd power power for digital circuit 20 egnd ground ground for mipi tx circuit 21 pvdd power power for pll circuit 22 xvclk input system input clock color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 23 dovdd power power for i/o circuit 24 mdp2 i/o mipi tx third data lane positive output 25 mdn2 i/o mipi tx third data lane negative output 26 mdp0 i/o mipi tx first data lane positive output 27 mdn0 i/o mipi tx first data lane negative output 28 mcp i/o mipi tx clock lane positive output 29 mcn i/o mipi tx clock lane negative output 30 egnd ground ground for mipi tx circuit 31 evdd power power for mipi tx circuit 32 mdp1 i/o mipi tx second data lane positive output 33 mdn1 i/o mipi tx second data lane negative output 34 mdp3 i/o mipi tx fourth data lane positive output 35 mdn3 i/o mipi tx fourth data lane negative output 36 dvdd power power for digital circuit 37 dgnd ground ground for digital circuit 38 avdd power power for analog circuit 39 agnd ground ground for analog circuit 40 vsnk analog i/o vcm driver current sink input 41 vsnk analog i/o vcm driver current sink input 42 vgnd ground ground for vcm driver 43 vgnd ground ground for vcm driver 44 dvdd power power for digital circuit 45 dgnd ground ground for digital circuit 46 dgnd ground ground for digital circuit 47 dvdd power power for digital circuit 48 dovdd power power for i/o circuit 49 dvdd power power for digital circuit 50 dovdd power power for i/o circuit 51 dvdd power power for digital circuit 52 dovdd power power for i/o circuit table 1-1 signal descriptions (sheet 2 of 3) pad number signal name pad type description default i/o status 05.09.2012 product specification proprie tary to omnivision technologies 1-3 53 agnd ground ground for analog circuit 54 avdd power power for analog circuit 55 dognd ground ground for i/o circuit 56 vh reference internal analog reference 57 vnh reference internal analog reference 58 vnl reference internal analog reference 59 agnd ground ground for analog circuit 60 sioc input sccb input clock table 1-2 configuration under various conditions (sheet 1 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 01 siod open drain i/o i/o open drain 02 vsync high-z high-z high-z by default (configurable) high-z by default (configurable) 03 frex high-z high-z high-z by default (configurable) high-z by default (configurable) 04 shutter high-z high-z high-z by default (configurable) high-z by default (configurable) 07 strobe high-z high-z high-z by default (configurable) high-z by default (configurable) 08 resetb input input input input 09 pwdnb input input input input 10 tm input input input input 22 xvclk input input input high-z 24 mdp2 high-z high-z high-z by default (configurable) high-z by default (configurable) 25 mdn2 high-z high-z high-z by default (configurable) high-z by default (configurable) 26 mdp0 high-z high-z high-z by default (configurable) high-z by default (configurable) table 1-1 signal descriptions (sheet 3 of 3) pad number signal name pad type description default i/o status color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 27 mdn0 high-z high-z high-z by default (configurable) high-z by default (configurable) 28 mcp zero zero zero by default (configurable) zero by default (configurable) 29 mcn zero zero zero by default (configurable) zero by default (configurable) 32 mdp1 high-z high-z high-z by default (configurable) high-z by default (configurable) 33 mdn1 high-z high-z high-z by default (configurable) high-z by default (configurable) 34 mdp3 high-z high-z high-z by default (configurable) high-z by default (configurable) 35 mdn3 high-z high-z high-z by default (configurable) high-z by default (configurable) 40 vsnk high-z open drain open drain high-z 41 vsnk high-z open drain open drain high-z 60 sioc input input input high-z table 1-2 configuration under various conditions (sheet 2 of 2) pad signal name reset after reset release software standby hardware standby (pwdnb = 0) 05.09.2012 product specification proprie tary to omnivision technologies 1-5 figure 1-1 pad diagram table 1-3 pad symbol and equivalent circuit (sheet 1 of 2) symbol equivalent circuit xvclk siod sioc agnd 15 avdd 14 dgnd 13 dvdd 12 sgnd 11 tm 10 pwdnb 9 resetb 8 strobe 7 agnd 6 avdd 5 shutter 4 frex 3 vsync 2 siod 1 sioc 60 agnd 59 vnl 58 vnh 57 vh 56 dognd 55 avdd 54 agnd 53 dovdd 52 dvdd 51 dovdd 50 dvdd 49 dovdd 48 dvdd 47 dgnd 46 16 agnd 17 avdd 18 dgnd 19 dvdd 20 egnd 21 pvdd 22 xvclk 23 dovdd 24 mdp2 25 mdn2 26 mdp0 27 mdn0 28 mcp 29 mcn 30 egnd 31 evdd 32 mdp1 33 mdn1 34 mdp3 35 mdn3 36 dvdd 37 dgnd 38 avdd 39 agnd 40 vsnk 41 vsnk 42 vgnd 43 vgnd 44 dvdd 45 dgnd OV8825 8825_cob_ds_1_1 pad en dognd from core to core open-drain pd pad dognd pd pad dognd color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 vsync, strobe, shutter, frex vnh, vnl, vh mdp3, mdp2, mdp1, mdp0, mdn3, mdn2, mdn1, mdn0, mcp, mcn, vsnk, vgnd, sgnd, egnd, agnd, dognd, dgnd avdd, evdd, dvdd, dovdd, pvdd resetb tm pwdnb table 1-3 pad symbol and equivalent circuit (sheet 2 of 2) symbol equivalent circuit din dout en pd dognd pad dovdd pad dognd pad dognd pad dognd pad dognd dognd dovdd dovdd pad dognd dovdd dovdd dovdd pad dognd 05.09.2012 product specification proprie tary to omnivision technologies 2-1 2 system level description 2.1 overview the OV8825 color image sensor is a low voltage, high per formance 1/3.2-inch 8 megapixel cmos image sensor that provides the functionality of a single 8 megapixel (3264 x2448) camera using omnibsi+? technology. it provides full-frame, sub-sampled, windowed 10-bit mipi images in various formats via the control of the serial camera control bus (sccb) interface. the OV8825 has an image array capable of operating at up to 24 frames per second (fps) in 10-bit 8 megapixel resolution with complete user control over image quality, forma tting and output data transfer. all required image processing functions, including exposure control, wh ite balance, defective pixel canceling, etc., are programmable through the sccb interface. in addition, omnivision image sensors use proprietary sens or technology to improve image quality by reducing or eliminating common lighting/electr ical sources of image contamination, such as fixed pattern noise, smearing, etc., to produce a clean, fully stable, color image. for customized information purposes, the OV8825 includes a one-time programmable (otp) memory. the OV8825 has up to four lanes of mipi interface. 2.2 architecture the OV8825 sensor core generates streaming pixel data at a constant frame rate. figure 2-1 shows the functional block diagram of the OV8825 image sensor. the timing generator outputs clocks to access the rows of the imaging array, precharging and sampling the rows of array sequentially. in the time between precharging and sampling a row, the charge in the pixels decrease with exposure to incident light. this is the exposure ti me in rolling shutter architecture. the exposure time is controlled by adj usting the time interval between prechar ging and sampling. after the data of the pixels in the row has been sampled, it is processed through analog circuitry to correct the offset and multiply the data with corresponding gain. following a nalog processing is the adc which outputs 10-bit data for each pixel in the array. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-1 OV8825 block diagram OV8825 image sensor core column sample/hold image sensor processor image output interface row select pll vcm plls control register bank sccb interface timing generator and system control logic gain control xvclk tm resetb pwdnb frex vsync shutter strobe sioc siod vsnk mcp/n mdp/n[3:0] temperature sensor image array amp mwb dpc scalar lenc 10-bit adc fifo mipi 8825_ds_2_1 05.09.2012 product specification proprie tary to omnivision technologies 2-3 2.3 format and frame the OV8825 supports raw rgb output with a one, two, or four lane mipi interface. table 2-1 mipi supported frame and frame rate (u sing 4 lanes, 700 mbps max data rate) format resolution maximum frame rate with mipi methodology full resolution (see figure 2-2 and table 2-4 ) 3264x2448 24 fps full eis1080p (see figure 2-3 and table 2-4 ) 2112x1188 30 fps crop+scale 1.5 (3168x1782) 1080p (see figure 2-2 and table 2-4 ) 1920x1080 30 fps crop+scale 1.7 (3264x1836) quartersize (see figure 2-2 and table 2-4 ) 1632x1224 30 fps binning+scale (3264x2448) eis720p (see figure 2-3 and table 2-4 ) 1408x792 30 fps / 60 fps crop+binningx2+sc ale 2.3 (3138x1822) hb2/vb2 720p (see figure 2-3 and table 2-4 ) 1280x720 30 fps / 60 fps crop+binningx2+sc ale 2.5 (3200x1800) hb2/vb2 eisq1080p 1056x594 30 fps / 60 fps crop+binningx2+sc ale 3.0 (3168x1782) hb2/vb2 q1080p 960x540 30 fps / 60 fps crop+binningx2+sc ale 3.4 (3264x1836) hb2/vb2 eisvga 704x528 90 fps / 120 fps crop+skip+scale vga (see figure 2-4 and table 2-4 ) 640x480 90 fps / 120 fps crop+skip+scale qvga 320x240 200 fps crop+skip table 2-2 mipi supported format and frame rate (u sing 2 lanes, 800 mbps max data rate) resolution frame rate description 4:3 full resolution (8 megapixel) 15 fps full frame 16:9 full resolution (cropped) 30 fps crop (3264x1838) 16:9 1080p using scalar 30 fps crop+scale (3264x1836) 16:9 720p using scalar 30 fps crop+scale (3200x1800) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-2 exposure/gain latch points for fu ll resolution, 1080p, and quarter size figure 2-3 exposure/gain latch points for eis1080p, eis720p, and 720p full size 3264x2448 setting (vh=2448, vts=2480) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 23 first row 22+vh last row context_switch 23+vh mipi eof 1080p 1920x1080 setting (vh=1080, vts=1868) -1 0 17 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 773+vh last row context_switch 774+vh mipi eof quarter size 1632x1224 setting (vh=1224, vts=1264) -1 lines lines lines 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 15 first row 14+vh last row context_switch 15+vh mipi eof 8825_ds_2_2 note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) eis1080p 2112x1188 setting (vh=1188, vts=1814) -1 0 18 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 24 first row 616+vh last row context_switch 617+vh mipi eof 720p 1280x720 setting (vh=720, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 16 first row 193+vh last row context_switch 194+vh mipi eof eis720p 1408x792 setting (vh=792, vts=928) -1 0 9 group latch vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 13 first row 130+vh last row context_switch 131+vh mipi eof 8825_ds_2_3 lines lines lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) 05.09.2012 product specification proprie tary to omnivision technologies 2-5 figure 2-4 exposure/gain latch points for vga 2.4 i/o control table 2-3 i/o control registers (sheet 1 of 2) function register description output drive capability control 0x3612 bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x vsync i/o control 0x3000 bit[1]: input/output control for vsync pad 0: input 1: output vsync output select 0x3010 bit[1]: output selection for vsync pad 0: normal data path (vertical sync signal) 1: register control value vsync output value 0x300d bit[1]: output value shutter i/o control 0x3000 bit[0]: input/output control for shutter pad 0: input 1: output shutter output select 0x3010 bit[0]: output selection for shutter pad 0: normal data path (illumination control signal) 1: register control value shutter output value 0x300d bit[0]: output value frex i/o control 0x3000 bit[2]: input/output control for frex pad 0: input 1: output frex output select 0x3010 bit[2]: output selection for frex pad 0: normal data path 1: register control value vga 640x480 setting (vh=480, vts=634) -1 0 6 group latch readout of frame n v blank of frame n v blank of frame n-1 vts/exp latch vts -1 0 group latch vts/exp latch mipi sof 8 first row 134+vh last row context_switch 135+vh mipi eof 8825_ds_2_4 lines note 1 note 2 vts = total vertical size in units of lines (refer to registers 0x380e, 0x380f) vh = vertical endpoint (refer to registers 0x3806, 0x3807) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.5 mipi interface the OV8825 supports one, two, and four lane mipi transmitter interfaces with up to 800 mbps per lane. figure 2-5 mipi timing frex output value 0x300d bit[2]: output value strobe i/o control 0x3000 bit[4]: output selection for strobe pad 0: normal data path 1: register control value strobe output select 0x3010 bit[4]: input/output control for strobe pad 0: input 1: output strobe output value 0x300d bit[4]: output value table 2-3 i/o control registers (sheet 2 of 2) function register description vsync mdp0 mdp1 mdp2 mdp3 (2) (8) (4) (6) (3) (1) (7) b8 s0 tr0 data t0 b8 crc0 tr0 tr0 ss0 b8 b8 s1 tr1 data t1 b8 crc1 tr1 tr1 ss1 b8 b8 s2 tr2 data t2 b8 tr2 tr2 ss2 b8 b8 s3 tr3 data t3 b8 tr3 tr3 ss3 b8 (9) (5) short package s0: start frame s1: frame cnt lsbs s2: frame cnt msbs s3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 note 1 note 2 note 3 note 4 input clock is 24 mhz in 8 megapixel and vga formats, mipi 4-lane mode, mipi data rate is 528.5 mbps/lane; tp is one sclk, which in this case is 100 mhz in 1080p, eis1080p, 720p, eis720p, and quartersize formats, mipi 4-lane mode, mipi data rate is 407.8 mbps/lane; tp is one sclk, which in this case is 100 mhz 1080p, eis1080p, 720p, eis720p, and vga are generated using raw scale function, in which value (4) will vary long package t0: data type t1: word cnt lsbs t2: word cnt msbs t3: ecc crc0: crc lsbs crc1: crc msbs tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 short package ss0: end frame ss1: frame cnt lsbs ss2: frame cnt msbs ss3: ecc tr0: trail 0 tr1: trail 1 tr2: trail 2 tr3: trail 3 8825_ds_2_5 05.09.2012 product specification proprie tary to omnivision technologies 2-7 table 2-4 mipi timing specifications (sheet 1 of 2) mode timing 8 megapixel 3264x2448 24 fps (1) 11,010,571 tp (2) 8,879 tp (3) 89,057 tp (4) 4,440 tp (5) 44,375 tp (6) 4,107 tp (7) 19 tp (8) 75,709 tp (9) 70 tp where tp = 1 sclk 1080p 3264x1836 => 1920x1080 (scale) 30 fps (1) 6,795,497 tp (2) 7,276 tp (3) 79,272 tp (4) 7,272 or 3,640 tp (5) 52,821 tp (6) 2,246 tp (7) 19 tp (8) 51,192 tp (9) 61 tp where tp = 1 sclk eis1080p 3168x1782 => 2112x1188 (scale) 30 fps (1) 6,791,403 tp (2) 7,488 tp (3) 80,234 tp (4) 3,744 or 7,488 tp (5) 36,822 tp (6) 2,666 tp (7) 19 tp (8) 63,906 tp (9) 61 tp where tp = 1 sclk 720p 3200x1800 => 1280x720 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 96,384 tp (4) 7,320 or 14,648 tp (5) 106,952 tp (6) 1,623 tp (7) 19 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 eis720p 2816x1584 => 1408x792 (binning + scale) 30 fps (1) 6,795,367 tp (2) 14,645 tp (3) 74,432 tp (4) 7,320 or 14,648 tp (5) 48,192 tp (6) 1,782 tp (7) 14 tp (8) 58,781 tp (9) 61 tp where tp = 1 sclk quartersize 3264x2448 => 1632x1224 (binning + scale) 30 fps (1) 6,796,835 tp (2) 10,754 tp (3) 64,983 tp (4) 5,376 tp (5) 142,591 tp (6) 2,063 tp (7) 19 tp (8) 43,217 tp (9) 61 tp where tp = 1 sclk vga 1280x960 => 640x480 (skip + scale) 90 fps (1) 2,935,433 tp (2) 9,260 tp (3) 23,646 tp (4) 4,632 or 9,256 tp (5) 95,820 tp (6) 827 tp (7) 19 tp (8) 23,382 tp (9) 68 tp where tp = 1 sclk table 2-4 mipi timing specifications (sheet 2 of 2) mode timing 05.09.2012 product specification proprie tary to omnivision technologies 2-9 2.6 vsync timing the width of vsync is two lines. register bit 0x4309[0] is used to control vsync mode. 2.6.1 vsync modes 2.6.1.1 vsync mode 1 vsync mode 1 is generated by internal start of frame (sof_i) signal sof (see figure 2-6 ). figure 2-6 vsync mode 1 timing 2.6.1.2 vsync mode 2 vsync mode 2 is generated by internal end of frame (eof: last href_o) (see figure 2-7 ). figure 2-7 vsync mode 2 timing table 2-5 vsync control registers address register name default value r/w description 0x4309 vsync mode 1?b0 rw bit[0]: vsync_mode 0: mode 1 1: mode 2 0x361e vsync polarity 1?b0 rw bit[0]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period pclk href_o vsync_o sof_i 2 lines 8825_ds_2_6 pclk href_o vsync_o 2 lines 8825_ds_2_7 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.7 external interface 2.7.1 external components image sensor power is provided from a 2.8v (typical) system power supply. an internal regulator provides 1.5v for core logic with i/o power (dovdd). typical i/o pad power is 1.8v. 2.8 power up sequence based on the system power configuration (1.8v or 2.8v for i/o power) using external dvdd or internal dvdd, the power up sequence will differ. if 1.8v is used for i/o power, using the internal dvdd is preferred. if 2.8v is used for i/o power, due to a high voltage drop at the internal dvdd regulator, there is a potential heat issue. hence, for a 2.8v power system, omnivision recommends using an external dvdd source. due to the higher power down current when using an external dvdd source, omnivision strongly recomm ends cutting off all power supplies, in cluding the external dvdd, when the sensor is not in use in the case of 2.8v i/o and external dvdd. 2.8.1 power up with internal dvdd for powering up with the internal dvdd and sccb access du ring the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure dovdd becomes stable before avdd becomes stable 2. pwdnb is active low with an asyn chronized design ( does not need clock) 3. pwdnb must be low during the power on period 4. for pwdnb to go high, power must first become stable (avdd to pwdnb 5 ms) 5. resetb is active low wi th an asynchronized design 6. state of resetb does not matter during power on period once dovdd is up 7. master clock xvclk should be prov ided at least 2 ms before host ac cesses the sensor?s registers 8. host can access sccb bus (if shared) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes high, host can access t he sensor?s registers to initialize sensor 05.09.2012 product specification proprie tary to omnivision technologies 2-11 figure 2-8 power up timing with internal dvdd 2.8.2 power up with external dvdd source for powering up with an external dvdd source and sccb acce ss during the power on period, the following conditions must occur: 1. when dovdd and avdd are turned on, make sure do vdd becomes stable befor e avdd becomes stable 2. when avdd and dvdd are turned on, make sure avdd becomes stable before dvdd becomes stable 3. pwdnb is active low with an asyn chronized design (does not need clock) 4. for pwdnb to go high, power must first become stable (dvdd to pwdnb 5 ms) 5. all power supplies are cut off when the camera is not in use (power down mode is not recommended 6. resetb is active low wi th an asynchronized design 7. state of resetb does not matter during power on period once dovdd is up 8. master clock xvclk should be provided at least 2 ms before host accesses the sensor?s registers 9. host can access sccb bus (if shar ed) during entire period. 20 ms after pwdnb goes high or 20 ms after resetb goes high if reset is inserted after pwdnb goes low, host can access the sensor?s registers to initialize sensor note t 0 0ms, delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0ms, delay from xvclk off to avdd off t 2 5ms, delay from avdd stable to sensor power up stable, pwdnb can be pulled high after this point, xvclk can be turned on after power on t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to avdd off sccb xvclk resetb pwdnb avdd dovdd t 4 t 0 t 2 t 5 >=0ms power on power off t 6 t 1 t 3 8825_ds_2_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-9 power up timing with external dvdd source dovdd avdd dvdd cut off power dovdd first, then avdd, followed by dvdd, and rising time is less than 5 ms pwdnb t 0 t 1 t 2 power on period note t 0 0 ms: delay from dovdd stable to avdd stable, it is recommended to power up avdd shortly after dovdd has been powered up t 1 0 ms: delay from avdd stable to dvdd stable t 2 5 ms: delay from dvdd stable to sensor power up stable t 3 1ms, delay from sensor power up stable to resetb pull up t 4 20ms, delay from resetb pull high to sccb initialization t 5 0ms, delay from avdd off to dovdd off t 6 0ms, delay from resetb pull low to dvdd off t 7 0ms, delay from xvclk off to dvdd off sccb xvclk resetb t 4 t 6 t 7 t 5 t 3 8825_ds_2_9 05.09.2012 product specification proprie tary to omnivision technologies 2-13 2.9 power management during power down, all registers keep their values. so, when power is resumed all the registers are restored to their previous values. in power down mode, the clock input of each block is turned off even when the ex ternal clock source is still clocking. 2.10 reset the OV8825 sensor includes a resetb pad (pad 08 ) that forces a complete hardware reset when it is pulled low (gnd). the OV8825 clears all registers and resets them to their def ault values when a hardware reset occurs. a reset can also be initiated through the sccb interface by setting register 0x0103 [0] to high. reset requires ~2ms settling time. 2.10.1 power on reset generation the power on reset can be controlled from external pin. however, inside this chip, a power on reset is generated after core power becomes stable. 2.11 hardware and software standby two suspend modes are available for the OV8825: ? hardware standby ? software standby 2.11.1 hardware standby to initiate a hardware standby, the pwdnb pad (pad 09 ) must be tied to low. when this occurs, the OV8825 internal device clock is halted and all internal counters are reset and regi sters are maintained. majority of the digital circuitry will remain in the power-cut state. 2.11.2 software standby executing a software standby through the sccb interface sus pends internal circuit activity but does not halt the device clock. all register content is maintained in standby mode. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.12 system clock control the OV8825 has an on-chip pll which generates the system cl ock from a 6~27 mhz input clock. a programmable clock divider is provided to generate different frequencies for the system. 2.12.1 pll configuration figure 2-10 OV8825 pll clock diagram note contact your local omnivision fae for additional assistance on pll configuration. table 2-6 pll configurations configuration register 0x3003 register 0x3004 register 0x3005 register 0x3006 register 0x3007 register 0x3012 register 0x3104 default 0x8e0x040x100x700x3b0x800x20 (sample 1) a a. sample setting is for 24 mhz mclk, sensor output of 8 megapixel at 24 fps with mipi clock of 264 mhz and 4-lane mipi output. 0xce 0xbf 0x10 0x00 0x3b 0x80 0x20 (6 ~ 27 mhz) 0 1 1 clk_pad mclk pre_div0 (0x3003[2:0]) 1/1.5/2/2.5/3/4/6/8 pre-divider (4 ~ 27 mhz) mipi_sclk sys_sel div124 (0x3003[7:6]) x 1/1/2/4 multiplier (400 ~ 1100 mhz) pllmipiclk sdiv0 (0x3005[3:0]) div0[3:0]+1 sys divider0 mipi_div (0x3005[7:4]) divm[3:0]+1 mipi_phy mipi divider pllpclk r_divp (0x3006[7]) 8/10 pclk divider sdiv1 (0x3006[3:0]) div1[3:0]+1 sys divider 1 r_seld5 (0x3006[6:4]) 1/1.5/2/2.5/3/3.5/4/5 seld5 divider div_cnt7b (0x3004[6:0]) x (129-divcnt7b) multiplier pll1 (6 ~ 27 mhz) note 1 note 2 note 3 note 4 note 5 note 6 note 7 input clock (xclk) range is 6 ~ 27 mhz clock after predivider for pll1 is 4 ~ 27 mhz, for pll2 is 6 ~27 mhz pll1 output clock range 400 ~ 1100 mhz pll2 output clock range 190 ~ 230 mhz to run full size full speed, adclck >= 200 mhz, sclk, adclk >= 100 mhz exposure unit line_period = hts/(sclk*2), where hts = 0x380c/0x380d frame time is line_period * vts, where vts = 0x380e/0x380f pre_div_sp (0x3007[1:0]) 1/1.5/2//3 pre-divider (6 ~ 27 mhz) 1 0 0 0 pllsysclk r_div_sp (0x3007[2]) x 1/2 multiplier (190 ~ 230 mhz) sdiv_sp (0x3012[3:0]) sdiv_sp[3:0]+1 sp divider div12_sp (0x3012[5:4]) 1/1/2/2.5 div12 divider div_cnt5b (0x3007[7:3]) x (32-divcnt5b) multiplier pll2 r_sclk_dac 0x3004[7] 0x3104[5] 0x3104[4] 1 0x3104[3] sclk /2 pclk div124_sp (0x3012[7:6]) 1/1/2/4 div124 divider adclk plladclk ~ 200 m 8825_ds_2_10 dac_sel dac_sel 05.09.2012 product specification proprie tary to omnivision technologies 2-15 2.13 serial camera control bus (sccb) interface the serial camera control bus (sccb) interface controls the image sensor operation. refer to the omnivision technologies serial camera control bus (sccb) specif ication for detailed usage of the serial control port. 2.13.1 data transfer protocol the data transfer of the OV8825 follows the sccb protocol. 2.13.2 message format the OV8825 supports the message format shown in figure 2-11 . the 7-bit address of the OV8825 is 0x36 by default but can be programmed using register 0x3002[7:1]. the repeated start (sr) condition is not shown in figure 2-12 , but is shown in figure 2-13 and figure 2-14 . figure 2-11 message type 2.13.3 read / write operation the OV8825 supports four different read oper ations and two different write operations: ? a single read from random locations ? a sequential read from random locations ? a single read from current location ? a sequential read from current location ? single write to random locations ? sequential write starting from random location the sub-address in the sensor aut omatically increases by one af ter each read/write operation. in a single read from random locations, the master does a dummy write operation to des ired sub-address, issues a repeated start condition and then addresses the camera agai n with a read operation. after acknowledging its slave address, the camera starts to output data onto the sda line as shown in figure 2-12 . the master terminates the read operation by setting a negative acknowledge and stop condition. slave address s r/w a a a sub address [15:8] sub address [7:0] a/a p data index[15:8] index[7:0] from slave to master from master to slave direction depends on operation s start condition p stop condition sr repeated start condition a acknowledge negative acknowledge a message type: 16-bit sub-address, 8-bit data, and 7-bit slave address 8825_ds_2_11 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 figure 2-12 sccb single read fr om random location if the host addresses the camera with read operation directly without the dummy write operation, the camera responds by setting the data from last used sub-address to the sda line as shown in figure 2-13 . the master terminates the read operation by setting a negativ e acknowledge and stop condition. figure 2-13 sccb single read from current location the sequential read from a random location is illustrated in figure 2-14 . the master does a dummy write to the desired sub-address, issues a repeated start condition after acknowledge from slave and addresses the slave again with read operation. if a master issues an acknowledge after receiving data , it acts as a signal to the slave that the read operation shall continue from the next sub-address. when master has read the last data byte, it issues a negative acknowledge and stop condition. figure 2-14 sccb sequential read from random location slave address s 0 a a a a sub address [15:8] sub address [7:0] sr 1 slave address a p data index m previous index value, k index m + 1 index value m 8825_ds_2_12 slave address s 1 a a s 1 slave address data a p a p data index k + 1 index k + 2 previous index value, k 8825_ds_2_13 slave address s 1 a a a a sub address [15:8] sub address [7:0] sr 1 slave address data a a p data index m previous index value, k index m + l - 1 index m + l index value m l bytes of data 8825_ds_2_14 05.09.2012 product specification proprie tary to omnivision technologies 2-17 the sequential read from current location is similar to a sequential read from a random loca tion. the only exception is that there is no dummy write operation. as shown in figure 2-15 . the master terminates the read operation by setting a negative acknowledge and stop condition. figure 2-15 sccb sequential read from current location the write operation to a random location is illustrated in figure 2-16 . the master issues a write operation to the slave, sets the sub-address and data correspondingly after the slave has acknowledged. the write operation is terminated with a stop condition from the master. figure 2-16 sccb single write to random location the sequential write is illustrated in figure 2-17 . the slave automatically increments the sub-address after each data byte. the sequential write operation is termi nated with stop condition from the master. figure 2-17 sccb sequential write to random location slave address s 1 a a a data data a p data index k + 1 previous index value, k index k + l - 1 index k + l l bytes of data 8825_ds_2_15 slave address s 0 a a a sub address [15:8] sub address [7:0] data p index m previous index value, k index m + 1 a/a index value m 8825_ds_2_16 slave address s 0 a a a a sub address [15:8] sub address [7:0] data index m previous index value, k index m + l - 1 index m + l data p a/a index value m l bytes of data 8825_ds_2_17 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 2.13.4 sccb timing figure 2-18 sccb interface timing table 2-7 sccb interface timing specifications ab a. sccb timing is based on 400khz mode b. timing measurement shown at the beginning of t he rising edge or/and of the falling edge signifies 10%, timing measurement shown in the middle of the rising/fa lling edge signifies 50%, timing measurement shown at the beginning of the rising edge or/and of the falling edge signifies 90% symbol parameter min typ max unit f sioc clock frequency 400 khz t low clock low period 1.3 s t high clock high period 0.6 s t aa sioc low to data out valid 0.1 0.9 s t buf bus free time before new start 1.3 s t hd:sta start condition hold time 0.6 s t su:sta start condition setup time 0.6 s t hd:dat data in hold time 0 s t su:dat data in setup time 0.1 s t su:sto stop condition setup time 0.6 s t r , t f sccb rise/fall times 0.3 s t dh data out hold time 0.05 s siod (out) siod (in) sioc t aa t dh t hd:dat t su:sto t f t su:sta t r t high t low t hd:sta t buf t su:dat 8825_ds_2_18 05.09.2012 product specification proprie tary to omnivision technologies 2-19 2.13.5 group write group write is supported in order to update a group of regist ers in the same frame. these registers are guaranteed to be written prior to the internal latch at the frame boundary. the OV8825 supports up to four groups. these groups shar e 512 byte ram and the size of each group is programmable by adjusting the start address. in the OV8825, the sccb id is 0x6c. table 2-8 sccb interface register address register name default value r/w description 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode table 2-9 context switching control (sheet 1 of 2) address register name default value r/w description 0x3208 group access ? w group access bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in group 0 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x320a grp1_period 0x00 rw frames for staying in group 1 0x320b grp_swctrl 0x01 rw bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 2-9 context switching control (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 3-1 3 block level description 3.1 pixel array structure the OV8825 sensor has an image array of 3296 columns by 2460 rows (8,108,160 pixels). figure 3-1 shows a cross-section of the image sensor array. the color filters are arranged in a bayer pattern. the primary color bg/gr array is arranged in line-alternating fashion. of the 8,108,160 pixels, 7,990,272 (3264x2448) are active pixels and can be output. the other pixels are used for black level calibration and interpolation. the sensor array design is based on a fiel d integration readout system with line-by -line transfer and an electronic shutter with a synchronous pixel readout scheme. figure 3-1 sensor array region color filter layout b g g r b g g r 3294 3295 columns b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3292 3293 dummy active pixel b g g r b g g r b g g r b g g r 12 13 14 15 b g g r b g g r rows b g g r b g g r b g g r b g g r 16 17 18 19 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 3276 3277 3278 3279 active pixel dummy b g g r b g g r b g g r b g g r 0 1 2 3 0 1 2 3 b g g r b g g r 8 9 rows b g g r b g g r 6 7 b g g r b g g r 4 5 b g g r b g g r 2456 2457 b g g r b g g r 2458 2459 2450 2451 2452 2453 b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r dummy b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2454 2455 b g g r b g g r dummy 8825_ds_3_1 3282 3283 3280 3281 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 3.2 subsampling there are two subsampling modes in the OV8825: binning and sk ipping. both are acceptable methods of reducing output resolution while maintaining the field of view. binning is usually preferred as it increases the pixel?s signal-to-noise ratio. when the binning function is on, voltage le vels of adjacent pixels are averaged. in skipping mode (binning function is off), alternate pixels, which are not output, ar e merely skipped. the OV8825 supports 2x2 binning. figure 3-2 illustrates 2x2 binning, where the voltage levels of two horizontal (2x1) adjacent same-color pixels are averaged before entering the adc. see table 3-1 for horizontal and vertical binning registers. figure 3-2 example of 2x2 binning table 3-1 binning-related registers binning/skip mode 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] v binning at array (avg), h binning at digital (sum) 1 0 x 0 v binning at array (avg), h binning at digital (avg) 1 0 x 1 v binning at digital (avg), h binning at array (avg) 0 1 x 0 v binning at digital (sum), h binning at array (avg) 0 1 x 1 v skip at array, h skip at array 0 0 0 x table 3-2 binning-related registers wh en not in sub-sampling mode mode a a. registers 0x3814=0x11 and 0x3815=0x11 0x370e[3] 0x3820[0] 0x3821[0] 0x6901[0] full/crop mode 0 0 0 x b g g r b g g r b g g r b g g r b g g r b g g r b g g r b g g r 2x2 blue pixels are binned to 1 blue pixel b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g b g g r b g g r b g g r b g g r b g 2x2 green pixels are binned to 1 green pixel 2x2 green pixels are binned to 1 green pixel 2x2 red pixels are binned to 1 red pixel 8825_ds_3_2 05.09.2012 product specification proprie tary to omnivision technologies 4-1 4 image sensor core digital functions 4.1 mirror and flip the OV8825 provides mirror and flip readout modes, whic h respectively reverse the sensor data readout order horizontally and vertically (see figure 4-1 ). figure 4-1 mirror and flip samples table 4-1 mirror and flip registers address register name default value r/w description 0x3820 timing reg20 0x00 rw timing control register bit[2:1]: vertical flip enable 00: normal 11: vertical flip 0x3821 timing reg21 0x00 rw timing control register bit[2:1]: horizontal mirror enable 00: normal 11: horizontal mirror f original image f flipped image f mirrored image f mirrored and flipped image 8825 _ ds _ 4 _ 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.2 image windowing an image windowing area is defined by four parameters, horizont al start (hs), horizontal end (he), vertical start (vs), and vertical end (ve). by properly setting the parameters, any po rtion within the sensor array size can output as a visible area. windowing is achieved by simply masking off the pixels outside of the window; thus, the original timing is not affected. figure 4-2 image windowing table 4-2 image windowing control functions function register r/w description horizontal start {0x3800, 0x3801} rw hs[12:8] = 0x3800 hs[7:0] = 0x3801 vertical start { 0x3802, 0x3803} rw vs[11:8] = 0x3802 vs[7:0] = 0x3803 horizontal end {0x3804, 0x3805} rw hw[12:8] = 0x3804 hw[7:0] = 0x3805 vertical end {0x3806, 0x3807} rw vh[11:8] = 0x3806 vh[7:0] = 0x3807 sensor array size x 8825 ds 4 2 sensor array size valid pixel (windowing) size sensor array size y (hs, vs) (0, 0) vh hw (he, ve) 05.09.2012 product specification proprie tary to omnivision technologies 4-3 4.3 test pattern for testing purposes, the OV8825 offers five types of test patterns: ? general color bar ? test pattern i and ii (16 bar) ? test pattern iii and iv (horizontal fading) 4.3.1 general color bar figure 4-3 test pattern table 4-3 general color bar selection control function register default value r/w description color bar 0x5e00 0x00 rw bit[7]: color bar enable 0: color bar off 1: color bar enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading color bar color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.3.2 test pattern i and ii (16 bar) 4.3.3 test pattern iii and iv (horizontal fading) table 4-4 test pattern i and ii selection control function register default value r/w description test pattern i & & ii 0x4303 0x00 rw bit[4]: 16 color bar inverse 0: normal 1: inverse bit[3]: 16 color bar enable 0: 16 color bar off 1: 16 color bar enable table 4-5 test pattern iii and iv selection control function register default value r/w description test pattern iii & & iv 0x4303 0x00 rw bit[7]: fading enable 0: disable 1: enable bit[6]: horizontal fading inverse 0: normal 1: inverse 05.09.2012 product specification proprie tary to omnivision technologies 4-5 4.4 black level calibration (blc) the pixel array contains several optically shielded (black) lines. these lines are used as reference for black level calibration. black level adjustments can be made with registers 0x4000, 0x4002, 0x4008, and 0x4009. table 4-6 blc control functions address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable bypass (blc enabled) 1: enable blc bypass (no blc) 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] 0x4008 blc target 0x00 rw bit[1:0]: black level target[9:8] 0x4009 blc ctrl09 0x10 rw bit[7:0]: black target level[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.5 one time programmable (otp) memory the OV8825 has a total of 2048 bits (256 bytes) of em bedded one time programmable (otp) memory. the 256 bytes of otp memory is divided into 8 banks , each bank has 32 bytes of memory. register 0x3d84[2:0] is a bank setting register. after setting the banks and sending a load request (register 0x3d81), the data can be loaded from registers 0x3d00~0x3d1f through the sccb interface. the first 5 by tes of bank 0 are reserved for omnivision fae use and the remaining bytes of bank 0 and the reset of the banks can be used by the customer. the otp can be programmed through a regular sccb write and can be read back through a regular sccb read. for otp write, it requires avdd to be 2.5v5% and for otp read, there is no such restriction. the following sections provide instructions on how to program the otp (can only be done once) and how to read back the otp (can be done multiple times). before read/write, make sure all sensor powers are properly provided and the sensor is up and running. the otp module is at def ault enabled state, 0x301c[4] is 1 and 0x301c[0] is 0. 4.5.1 otp program an example of programming otp addresses 0x3d1c~0x3 d1f is shown below. if the whole bank is not being programmed, make sure non-programmable addresses 0x3d00~0x3 d1b are at default value of 0 to avoid accidental programming to other otp addresses. 6c 3d80 00 6c 3d84 09 ; set bank 1 6c 3d1c 1c 6c 3d1d 1e 6c 3d1e 1f 6c 3d1f 20 ;//program to bank 1 otp 6c 3d80 01 ; #delay 25ms 6c 3d80 00 table 4-7 otp control functions function register description otp program 0x3d80 bit[0]: program otp otp load / dump 0x3d81 bit[0]: load / dump otp otp bank select 0x3d84 bit[3]: bank mode enable bit[2:0]: bank index dump / program data n 0x3d00 ~ 0x3d1f bit[7:0]: data dumped or data to be programmed for bits[8*(n+1)-1:8*n] 05.09.2012 product specification proprie tary to omnivision technologies 4-7 4.5.2 otp read after programming and at any time after the sensor is powered on, use the proc edure shown below to read back the otp values. before each read, the user can clear 0x3d 00~0x3d1f registers first if just finished write. 6c 3d84 09 ; set bank 1 6c 3d81 01 ; otp read enable #delay 3ms 6c 3d1c ; read bank 1 data 29 6c 3d1d ; read bank 1 data 30 6c 3d1e ; read bank 1 data 31 6c 3d1f ; read bank 1 data 32 4.6 temperature sensor the OV8825 supports an on-chip temperature sensor that cove rs 0~80c with an error range of 5c. it can be controlled through the sccb interface (see table 4-8 ). when the temperature is lower than 0c, the reading will stop at 0c. before reading the temperature, the temperature sensor should be triggered by a 0 to 1 transition of register bit 0x670b[7]. this module needs a 1-3mhz clock divided from xvclk. if xvclk is 24mhz, 0x6706[3:0] must be set to 4?b1000. table 4-8 temperature sensor functions function register r/w description temp clock divisor 0x6706 rw bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz tpm trigger / read 0x670b rw bit[7]: temperature sensor trigger bit[6:0]: measured temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7 context switching the OV8825 supports a shadowing of registers that enable the pr e-loading of two different configurations of window, subsampling, scaling, integration time, and gain. with one r egister controlling which bank is the active settings, the OV8825 supports switching from context a to context b in x frames where x frames is up to 255 frames. the OV8825 supports staying at context b for a programmable number of fram es from 1 to 255 frames where a value of 0 is to stay at context b until changed. this sync shou ld also be coordinated with strobe control. 4.7.1 context switching time for any case where the context switching starts off as elec tronic rolling shutter and ends with electronic rolling shutter, the changes will take effect in the second frame. this mode is inclusive of auto exposure where there is a change to integration time but the c ontext is not actually changed. for any case where the context starts off as one mode and switches to the other mode, this change will happen in the next frame. if the switch is received while a frame is being read out, then that frame will continue to be read out until complete and the next frame will be the new mode. if the comm and is issued while a frame is not being read out (i.e., the last row of frame n-1 is completed and the first row of frame n has not started to be read yet), then the current rows being exposed are abandoned and the m ode is changed immediately. both of these statements are inclusive of changes to binning , integration time, resolution, and resizing. there are three possible changes that can happen: ? a change that does not result in a sensor mode change ? a sensor mode change from electronic rolling shutter to global shutter ? a sensor mode change from global shu tter to electronic rolling shutter table 4-9 context switching latency mode change latency a a. where latency is from the last row read out in the current mode to when integration of the next mode starts context change with no mode change 1 frame electronic rolling shutter to global shutter <5 s global shutter to electron ic rolling shutter <1 ms 05.09.2012 product specification proprie tary to omnivision technologies 4-9 4.7.1.1 example 1 in example 1, we issue a change from context a to context b where both context a and cont ext b is electronic rolling shutter. the change is issued at node 1. the next fram e is unchanged and the following frame changes to context b. although this change is shown as a change from context a to context b, it is also represented by a change to exposure within context a. figure 4-4 context switching without sensor mode change 4.7.1.2 example 2 example 2 illustrates a multiple consec utive context switch. in this example, we issue a change from context a to context b to context c in three consecutive frames where context a, context b, and c ontext c are electronic rolling shutter and can have different integration times. the change is issued at node 1. the next frame is unchanged and the following frame changes to context b. context b to context c changes are issued at node 2. the frame after context b will be changed to context c. figure 4-5 multiple consecutive context switching context a context a context a context a context b 1 2 time 8825_ds_4_4 context a context a context b context c context c 1 2 time 8825_ds_4_5 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.1.3 example 3 context a is full resolution with 2x2 binning at 15 fps with el ectronic rolling shutter with duration of 0. context b is full resolution at 15 fps with global re set and mechanical shutter with duration of 1 frame. the system stays at context a until told to change because duration is set to 0. at node 1, the command is sent to change to context b. the sensor finishes sending the data for the current frame. the rows currently integrating for the next frame are lost. the shutter is intended to close at 3, however, because of th e programmed delay, the signal is sent at node 2 to overcome system latency. at node 5, the system switches back to context a with electronic rolling shutter. figure 4-6 electronic rolling shutter to global reset context switching example figure 4-7 context change for global reset to electronic rolling shutter context a context a context a context b switching latency time 8825_ds_4_6 context b context a context a context a time row read out time row integration time switching latency 8825_ds_4_7 05.09.2012 product specification proprie tary to omnivision technologies 4-11 4.7.1.4 bracketed exposure example figure 4-8 bracketed exposure context example context a context a context a context b context b 4 1 5 6 blanking example b shown in time. where 4 has an ev of -1, 5 has an ev of 0 and 6 has an ev of +1. this would require each context to be set to duration of 1 frame, and the integration time would need to be reprogramed while other context is active. context a: full res, 2x2 binning, 15 fps, ers, indefinite. context b: full res, 15 fps 1 frame mechanical shutter with global reset. mechanical shutter delay time desired shutter close time 2 3 8825_ds_4_8 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.7.2 context switching control the OV8825 supports switching between two different groups of sensor configuration. it can be controlled through the sccb interface (see table 4-10 ). each group can define up to 84 registers. switching point and length are defined based on concept of number of frames, which can be up to 255 frames. 4.8 illumination control the OV8825 supports illumination control. it ca n be controlled through the sccb interface (see table 4-11 ). the pwm duration and duty cycle are programmable. the pwm is programmed such that a frame is divided into 32 time slots. each frame is pwm cycle. figure 4-9 illumination diagram 1 table 4-10 context switching control functions function register description group access 0x3208 bit[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[3:0]: group_id 0000: group bank 0 (default start from address 0x00) 0001: group bank 1 (default start from address 0x40) 0010: group bank 2 (default start from address 0x80) 0011: group bank 3 (default start from address 0xb0) others: reserved grp0_period 0x3209 frames for staying in grp0 grp1_period 0x320a frames for staying in grp1 grp_swctrl 0x320b bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection delay 2 % duty cycle 2 duration 1 # frames duration 2 delay 1 illumination sync frame sync % duty cycle 1 8825_ds_4_9 05.09.2012 product specification proprie tary to omnivision technologies 4-13 delays are from -0.5 of a frame to 0.5 of frame with 5-bit re solution, where 16 is equal to zero delay. the step is a time slot. zero delay is the default value. the gap between the two pwms is number of frames, which can be programmable from 0 to 255, with zero as the default. duration is programmable from 0 to 16 frames with 4-bit resolution. each step is a frame. in the case where the delay + duration results in the illuminat ion ending prior to the end of a frame, the number of frames starts at the next full frame. figure 4-10 illumination diagram 2 in this case, the pwm duration 1 and duration 3 have the same control as the illumination case 1. for duration 2 and duration 4, the ramps can be smoothed out. both the duty cycle step for each frame increase and the frame number, which repeats the same duty cycle, can be set by registers. if the repeat bit is set, the waveform will repeat until cleared. after clearing the repeat bit, the waveform will finish one f ull cycle before taking effect. this means that duration 4 s hould be completed in its entirety before the cycle is ended. table 4-11 illumination control functions (sheet 1 of 2) function register description pwm 1 delay 0x6600 bit[4:0]: pwm1 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 2 delay 0x6601 bit[4:0]: pwm2 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 3 delay 0x6602 bit[4:0]: pwm3 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame pwm 4 delay 0x6603 bit[4:0]: pwm4 delay 0~31 0x00: -0.5 frame 0x31: 0.5 frame duration control 0 0x6604 bit[7:4]: pwm2 duration width (0~15 frames) bit[3:0]: pwm1 duration width (0~15 frames) duty cycle 2 duration 1 duty cycle 1 duty cycle 1 duty cycle 3 duration 2 duration 3 duration 4 8825_ds_4_10 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.9 vcm driver the OV8825 supports vcm control. it can be controlled through the sccb interface (see table 4-12 ). different target, slew, and step can be controlled. figure 4-11 vcm block diagram duration control 1 0x6605 bit[7:4]: pwm4 duration width (0~15 frames) bit[3:0]: pwm3 duration width (0~15 frames) pwm 1 duty cycle control 0x6606 b it[4:0]: pwm1 duty cycle 0~31 pwm 2 duty cycle control 0x6607 bit[4:0]: pwm2 duty cycle increase step 0~31 pwm 3 duty cycle control 0x6608 b it[4:0]: pwm3 duty cycle 0~31 pwm 4 duty cycle control 0x6609 bit[4:0 ]: pwm4 duty cycle decrease step 0~31 gap1 control 0x660a bit[7:0]: gap between pwm1 and pwm2 gap2 control 0x660b bit[7:0]: gap between pwm2 and pwm3 gap3 control 0x660c bit[7:0]: gap between pwm3 and pwm4 gap4 control 0x660d bit[7:0]: gap between pwm4 and pwm1 when repeat is on illum_ctrl 0x660e bit[7]: pwm_request bit[5]: illum_sel bit[0]: repeat_en table 4-11 illumination control functions (sheet 2 of 2) function register description vvcm voice coil motor r vcm resistor rs = 3.3 vcm gnd pad r p2 current sinking pad r p1 v ds 8825_ds_4_11 05.09.2012 product specification proprie tary to omnivision technologies 4-15 the maximum sink current can be estimated as: ? isink = (vvcm - vds) / (rs + rvcm + rp1 + rp2) ? vds is the transistor headroom ? rp1 and rp2 are the resistance in the current path ? rvcm is the resistance of the voice coil motor. the OV8825 vcm driver is a single 10-bit dac with 100 ma outpu t current sink capability. it is designed for linear control of the vcm. the dac is controlled via the sccb interfac e. the OV8825 vcm driver provides three types of output current control modes that allow users to adj ust transient response of the sinking current. 4.9.1 output current mode the OV8825 vcm driver uses four bits (s3, s2, s1, and s0) to control the output current response. ? s[3:0] = x000: directly jump mode: code directly jumps to target code (see figure 4-12 ). output current transient response time is shown in table 8-5 . ? s[3:0] = 0001 to 0111: single step mode: code increases/ decreases by a single step. single step time durations are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-13 ). ? s[3:0] = 1001 to 1111: multi-c ode steps mode: code increases/decreases in multi-code steps. if the target code and the current code have a difference larger than 128, the 64-code step is applied first. when the difference in between target and current codes is no more than 128 but larger than 16, the 16-code step is used. when the differenc e is less than 16, it will directly jump to the target code. single step time options are 50s, 100s, 200s, 400s, 800s, 1600s, and 3200s, which are controlled by s2, s1, and s0 (see table 4-14 ). table 4-12 vcm control functions (sheet 1 of 2) function register description a_vcm_low 0x3618 bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] a_vcm_mid0 0x3619 bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] a_vcm_mid1 0x361a bit[7:0]: rdiv[7:0] a_vcm_mid2 0x361b bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 a_vcm_high 0x361c bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id table 4-13 single step mode mode s3 s2 s1 s0 single step transition time full scale transition time (1023 steps) single step mode 0 0 0 1 50s 51.15ms 0 0 1 0 100s 102.3ms 0 0 1 1 200s 204.6ms 0 1 0 0 400s 409.2ms 0 1 0 1 800s 818.4ms 0 1 1 0 1600s 1.637s 0 1 1 1 3200s 3.274s table 4-14 multi-code step mode mode s3 s2 s1 s0 single step transition time full scale transition time (22 steps) a a. a full scale transition includes fourteen 64-code steps, seven 16-code steps and one directly jump step. single step mode 100150s 1.1ms 1 0 1 0 100s 2.2ms 1 0 1 1 200s 4.4ms 1 1 0 0 400s 8.8ms 1 1 0 1 800s 17.6ms 1 1 1 0 1600s 35.2ms 1 1 1 1 3200s 70.4ms table 4-12 vcm control functions (sheet 2 of 2) function register description 05.09.2012 product specification proprie tary to omnivision technologies 4-17 figure 4-12 1/4 to 3/4 scale settling time (directly jump mode, vdd = 3.0v) 1.25e-03 1.27e-03 1.29e-03 1.31e-03 1.33e-03 1.35e-03 1.37e-03 5.00e-02 5.50e-02 6.00e-02 7.00e-02 8.00e-02 9.00e-02 6.50e-02 7.50e-02 8.50e-02 9.50e-02 1.00e-01 1/4 to 3/4 scale settling time (v dd = 3.0v) output current (ma) 8825_ds_4_12 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10 strobe flash and frame exposure 4.10.1 strobe flash control the strobe signal is programmable. it supports both le d and xenon modes. the polarity of the pulse can be changed. the strobe signal is enabled (turned high/low depending on the pul se?s polarity) by requesting the signal via the sccb interface. flash modules are triggered by the rising edge by default or by the falling edge if the signal polarity is changed. the OV8825 supports the follow ing flashlight modes (see table 4-15 ). 4.10.1.1 xenon flash control after a strobe request is submitted, the strobe pulse wi ll be activated at the beginning of the third frame (see figure 4-13 ). the third frame will be correctly exposed. the pulse width can be changed in xenon mode between 1h and 4h, depending on register 0x3b00[5:4], where h is one row period. figure 4-13 xenon flash mode table 4-15 flashlight modes mode output aec / agc awb xenon one-pulse no no led 1 continuous yes yes led 2 one-pulse yes yes vertical blanking exposure time data out strobe request strobe pulse strobe pulse zoomed request here 1h correctly exposed frame 8825_ds_4_13 05.09.2012 product specification proprie tary to omnivision technologies 4-19 4.10.1.2 led 1 mode in led 1 mode, the strobe signal stays acti ve until the strobe end request is sent (see figure 4-14 ). figure 4-14 led 1 mode 4.10.1.3 led 2 mode in led 2 mode, the strobe signal width is controlled by r egister 0x3b02 (see figure 4-15 ). strobe width = 128 (2**0x3b02[1:0]) (0x3b02[7:2] + 1) sclk_period. the maximum value of 0x3b02[7:2] is 6?b111110. figure 4-15 led 2 mode vertical blanking exposure time data out strobe request strobe signal correctly exposed frame request here request here start end 8825_ds_4_14 vertical blanking exposure time data out strobe request strobe pulse request here correctly exposed frame 8825_ds_4_15 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 4.10.2 frame exposure (frex) mode in frex mode, all pixels in the frame start integration at the same time, rather than integrating row by row. after a user-defined exposure time, the mechani cal shutter should be closed, preventing further integration and the image begins to read out. after the readout finishes, the shutter opens again and the sensor resumes normal mode, waiting for the next frex request. the OV8825 supports two modes of frex (see figure 4-16 and figure 4-17 ): figure 4-16 frex mode 1 figure 4-17 frex mode 2 sccb data/sync frex shutter strobe sensor system shutter 8825 _ ds _ 4 _ 16 sccb data/sync frex strobe sensor system shutter 8825_ds_4_17 05.09.2012 product specification proprie tary to omnivision technologies 4-21 in mode 1, the frex pin is configured as an input while it is configured as an output in mode 2. in both mode 1 and mode 2, the strobe output is irrelevant with the rolling strobe f unction. when in rolling shutter mode, the strobe function and this frex/shutter control function do not work at the same time. the timing diagram for mode 1 is shown in figure 4-18 . figure 4-18 frex mode 1 timing diagram in mode 1, the host asserts frex at any time in preview mode (mechanical shutter is open at th is time). the sensor will trigger strobe to indicate the start of exposure time. exposure ti me is calculated from the strobe rising edge to when the mechanical shutter closes. the host will control when to close the mechanical shutter (shutter delay is handled by the host). the host can re-open the shutter after receiving the entire image data or the next vsync signal. t exp t pchg frex mode 1: pad trigger vsync frex in strobe out shutter 8825_ds_4_18 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 the timing diagrams for mode 2 are shown in figure 4-19 and figure 4-20 . figure 4-19 frex mode 2 (shutter delay = 0) timing diagram figure 4-20 frex mode 2 (shutter delay > 0) timing diagram before using mode 2, the host needs to program expos ure time at (frex_exp), shutter delay (registers 0x3b0c , 0x3b0d ), strobe width, and data output delay. the host triggers this mode by sccb at any time in preview mode (mechanical shutter is open at this time). the sensor can either start frame exposure right away (since the current data packet is broken, the receiver may get a packet error) or wait for the cu rrent frame to finish (controlled by register). the sensor will t exp t pchg t datout_dly shutter close vsync strobe out shutter frex out sccb 8825_ds_4_19 t exp t1 t2 t3 t0 t internal _ dly t shutter _ dly t pchg shutter close t datout_dly vsync sccb strobe out frex out shutter 8825_ds_4_20 05.09.2012 product specification proprie tary to omnivision technologies 4-23 trigger strobe to indicate the start of exposure time. ex posure time is calculated fr om strobe rising edge to when the mechanical shutter closes. the host c an control the sensor to start sending image data after a certain delay (registers 0x3b10 , 0x3b11 ) after frex goes low. the host can re-open the shutter after receiving the entire image data or the next vsync signal. see table 4-16 for frex strobe control functions. table 4-16 frex strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] msb of frame exposure time in mode 2. exposure time is in units of 128 x (2**gain) x (step+1) x sclk_period. see 0x3b06 and 0x3b07 . 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] middle byte of frame exposure time in mode 2. see 0x3b05 and 0x3b07 . 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] lsb of frame exposure time in mode 2. see 0x3b05 and 0x3b06 . 0x3b09 frex ctrl 04 0x00 rw bit[3:0]: strobe_width[19:16] msb of strobe width in mode 2. strobe width is in units of 1 clock cycle. see registers 0x3b0a and 0x3b0b . color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] middle byte of strobe width in mode 2. see registers 0x3b09 and 0x3b0b . 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] lsb of strobe width in mode 2. see registers 0x3b09 and 0x3b0a . 0x3b0c frex ctrl 07 0x00 rw bit[4:0]: shutter_dly[12:8] msb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0d . 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] lsb of shutter delay in mode 2. shutter delay is in units of 128 clock cycles. see register 0x3b0c . 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] msb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0f . 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] lsb of sensor precharge in mode 2. sensor precharge is in units of 1 system clock cycle (see section 2.12.1 ). see register 0x3b0e . 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] msb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b11 . 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] lsb of readout delay time in mode 2. readout delay time is in units of 128 clock cycles. see register 0x3b10 . 0x3b1f frex ctrl 0d 0x04 rw bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[0]: frex_repeat_trig table 4-16 frex strobe control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 4-25 4.10.2.1 exposure time control registers: r_frame_exp = {0x3b05, 0x3b06, 0x3b07}, 24 bits, 1 step = 128 clock cycles. minimum exposure time: 0x3b05 = 0x 00, 0x3b06 = 0x00, 0x3b07 = 0x00. if OV8825 works at 96 mhz, the minimum exposur e time is 0 and minimum step is 1.33 s. maximum exposure time: 0x3b05 = 0xff , 0x3b06 = 0xff, 0x3b07 = 0xff. if OV8825 works at 96 mhz, the maximum exposure time is 22.37 sec. 4.10.2.2 shutter delay control registers: r_shutter_dly = {0x3b0c[4:0], 0x3b 0d[7:0]}, 13 bits, 1 step = 128 clock cycles. minimum shutter delay time: 0x3b0c = 0x00, 0x3b0d = 0x00. minimum step is 1.33 s. maximum shutter delay time: 0x 3b0c = 0x1f, 0x3b0d = 0xff. if OV8825 works at 96 mhz, the maximum shutter delay time is 10.92 ms. 4.10.2.3 sensor precharge control registers: r_frex_pchg = {0x3b0e[7:0], 0x3b0f[7:0]}, 16 bits , 1 step = 1 system clock cycl e (refer to pll section). these registers affect sensor performance. it is for inte rnal use and not recommended for customer to change. time requirement? 10 s, for example. 4.10.2.4 strobe control registers: r_strobe_width = {0x3b09[3:0], 0x3b0a [7:0], 0x3b0b[7:0]}, 20 bits , 1 step = 1 clock cycle. these registers control the strobe signal output width. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 5-1 5 image sensor proces sor digital functions 5.1 isp general controls the isp module provides image processo r functions, including lens correction and defect pixel cancellation. these functions are enabled by registers 0x5000, 0x5001, 0x5003, 0x5005, 0x501f, 0x5025, and 0x5041. table 5-1 isp general control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable 0x5001 mwb_gain_ clock_enable 0x01 rw bit[0]: mwb gain clock enable 0: disable clock 1: enable clock 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3]: lenc bias plus 0: disable 1: enable bit[2]: lenc bias on 0: disable 1: enable bit[1:0]: not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5025 isp ctrl 25 0x10 rw bit[1:0]: avg_sel 00: raw_i 01: lenc 10: mwb_gain 0x503d isp ctrl 3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl 3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl 3f 0x20 rw bit[7:0]: debug mode 0x5041 isp ctrl 41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: scaling enable 0: disable 1: enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl 43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl 44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl 4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl 4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl 4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl 4d 0x00 rw bit[7:0]: debug mode table 5-1 isp general control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-3 5.2 lenc the lens correction (lenc) algorithm compensates for the i llumination drop off in the corners due to the lens. based on the radius of each pixel to the lens, the algorithm calcul ates a gain for each pixel and then corrects each pixel with the calculated gain to compensate for the light distribution due to the lens curvature. additionally, lenc supports subsampling in both the horizontal and vertical di rections. lenc is performed in the rgb domain. luminance channel consists of 36 cont rol points while each color channel consists of 25 control points. figure 5-1 control points of luminance and color channels figure 5-2 luminance compensation level calculation * g00 * g10 * g20 * g30 * g40 * g50 * g01 * g11 * * ** * g02 * * * ** * g03 * * * ** * g04 * * * ** * g05 ***** g55 * b00/r00 * b10/r10 * b20/r20 * b30/r30 * b40/r40 * b01/r01 * b11/r11 * ** * b02/r02 * * ** * b03/r03 * * ** * b04/r04 **** b44/r44 8825_ds_5_1 sensorgainthreshold1 sensorgainthreshold2 min lenc gain 64 lenc gain sensor g ain 8825_ds_5_2 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 note there is a lens calibration tool that can be used for calibrating these settings required for a specific module. contact your local omnivision fae for generating these settings. table 5-2 lenc control registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable 0x5800 lenc g00 0x00 rw bit[5:0]: control point g00 for luminance compensation 0x5801 lenc g01 0x00 rw bit[5:0]: control point g01 for luminance compensation 0x5802 lenc g02 0x00 rw bit[5:0]: control point g02 for luminance compensation 0x5803 lenc g03 0x00 rw bit[5:0]: control point g03 for luminance compensation 0x5804 lenc g04 0x00 rw bit[5:0]: control point g04 for luminance compensation 0x5805 lenc g05 0x00 rw bit[5:0]: control point g05 for luminance compensation 0x5806 lenc g10 0x00 rw bit[5:0]: control point g10 for luminance compensation 0x5807 lenc g11 0x00 rw bit[5:0]: control point g11 for luminance compensation 0x5808 lenc g12 0x00 rw bit[5:0]: control point g12 for luminance compensation 0x5809~ 0x5822 lenc g13~ lenc g54 0x00 rw bit[5:0]: control point g13~g54 for luminance compensation 0x5823 lenc g55 0x00 rw bit[5:0]: control point g55 for luminance compensation 0x5824 lenc br00 0x00 rw bit[7:4]: control point b00 for blue channel compensation bit[3:0]: control point r00 for red channel compensation 0x5825 lenc br01 0x00 rw bit[7:4]: control point b01 for blue channel compensation bit[3:0]: control point r01 for red channel compensation 0x5826 lenc br02 0x00 rw bit[7:4]: control point b02 for blue channel compensation bit[3:0]: control point r02 for red channel compensation 05.09.2012 product specification proprie tary to omnivision technologies 5-5 0x5827 lenc br03 0x00 rw bit[7:4]: control point b03 for blue channel compensation bit[3:0]: control point r03 for red channel compensation 0x5828 lenc br04 0x00 rw bit[7:4]: control point b04 for blue channel compensation bit[3:0]: control point r04 for red channel compensation 0x5829~ 0x583c lenc br10~ lenc br44 0x00 rw bit[7:4]: control point b10~b44 for blue channels compensation bit[3:0]: control point r10~r44 for red channels compensation 0x583d lenc broffset 0x88 rw bit[7:4]: base value for all blue channel control points bit[3:0]: base value for all red channel control points 0x583e lenc sensorgain threshold1 0x40 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will be the minimum value (min lenc gain). register value is 16 times sensor gain. 0x583f lenc sensorgain threshold2 0x20 rw bit[7:0]: if autolensswitchenable is true and sensor gain is larger than this threshold, luminance compensation amplitude will start to decrease; otherwise, the amplitude will not change. register value is 16 times sensor gain. 0x5840 min lenc gain 0x18 rw bit[6:0]: this value i ndicates the minimum amplitude which luminance channel compensates when autolensswitchenable is true. value should be in the range [0~64] table 5-2 lenc control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5841 lenc ctrl 0x00 rw bit[3]: add blc target 0: do not add blc target after applying compensation 1: add blc target after applying compensation bit[2]: subtract blc target 0: do not subtract blc target after applying compensation 1: subtract blc target after applying compensation bit[1]: reserved bit[0]: autolensswitchenable 0: luminance compensation amplitude does not change with sensor gain 1: luminance compensation amplitude changes with sensor gain 0x5842 lenc brhscale 0x00 rw for horizontal color gain calculation, this value indicates the step between two connected horizontal pixels. brhscale = 3145728 / imagewidth bit[2:0]: br_hscale[10:8] 0x5843 lenc brhscale 0x00 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc brvscale 0x00 rw for vertical color gain ca lculation, this value indicates the step between two connected vertical pixels. brvscale = 3145728 / imageheight bit[2:0]: br_vscale[10:8] 0x5845 lenc brvscale 0x00 rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ghscale 0x00 rw for horizontal luminance gain calculation, this value indicates the step between two connected horizontal pixels. ghscale = 4194304 / imagewidth bit[2:0]: g_hscale[10:8] 0x5847 lenc ghscale 0x00 rw bit[7:0]: g_hscale[7:0] 0x5848 lenc gvscale 0x00 rw for vertical luminance gain calculation, this value indicates the step between two connected horizontal pixels. gvscale = 4194304 / imageheight bit[2:0]: g_vscale[10:8] 0x5849 lenc gvscale 0x00 rw bit[7:0]: g_vscale[7:0] table 5-2 lenc control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-7 5.3 defect pixel cancellation (dpc) primarily due to process anomalies, pixel defects in the sensor array will occur, generating incorrect pixel levels and color values. the purpose of defect pixel cancellation (dpc) is to remove the effects caused by de fective pixels. to correctly remove defective pixels the proper threshold should first be determined. defective pixels usually exhibit an abr upt change compared to normal pixels to which the human eye is sensitive. the dpc algorithm is designed to recover these white or black pixels while maintaini ng image quality. as the position of these defective pixels is not registered, the dpc al gorithm may remove some of the image details. table 5-3 dpc register address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[2]: remove black defect pixel 0: disable 1: enable bit[1]: remove white defect pixel 0: disable 1: enable color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.4 scalar the OV8825 includes a scalar function that allows the user to arbitrarily set an output image size (width and height) that is smaller than the designated array size. the scalar module outputs the specified image size and maintains the field-of-view as the input image to the scalar. note that the frame rate will not change in scaling mode. figure 5-3 scaling function 1. the scaling function is automatic enable and disable. the user only needs to set the image input size, output size and offset. if the output size < (input size ? 2 of fset), scaling is enabled; ot herwise, scaling is disabled. to disable the scaling function manually, set register 0x5041[7] to 0. horizontal output size: {0x3808, 0x3809} vertical output size: {0x380a, 0x380b} horizontal offset: {0x3810, 0x3811} vertical offset: {0x3812, 0x3813} horizontal input size: horizontal endpoint {0x3804, 0x3805} ? horizontal start point {0x3800, 0x3801} vertical input size: vertical endpoint {0x 3806, 0x3807} ? vertical start point {0x3802, 0x3803} 2. calculate the scaling factor ((input _size ? 2 offset) / output_size) 128 based on the scaling factor, get hscale_ctrl and vscale_ctrl from table 5-4 using the following criteria: if scale_factor is located in column factor 1, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 2, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. if scale_factor is located in column factor 3, hscale_ctrl[7:6] or vscale[7:6] = 2?b01. pre-scaling size data output size (after scaling) isp input size physical pixel size horizontal endpoint {0x3804, 0x3805} horizontal offset {0x3810, 0x3811} vertical endpoint {0x3806, 0x3807} horizontal offset {0x3810, 0x3811} vertical offset {0x3812, 0x3813} vertical offset {0x3812, 0x3813} horizontal start point {0x3800, 0x3801} vertical start point {0x3802, 0x3803} (0, 0) horizontal output size {0x3808, 0x3809} vertical output size {0x380a, 0x380b} 8825_ds_5_3 05.09.2012 product specification proprie tary to omnivision technologies 5-9 if both hscale_factor and vscale_factor are the same, hscale_ctrl[4:0] = scale_ctrl0 and vscale_ctrl[4:0] = scale_ctrl1. if hscale_factor and vscale_factor are different, use column scale_ctrl1. for example, hscale_factor = 400, vscale_factor = 400 hscale_ctrl[7:6] = 2?b01, hscale_ctrl[4:0] = 0x14 vscale_ctrl[7:6] = 2?b01, vscale_ctrl[4:0] = 0x15 table 5-4 scalar factor calculation matrix (sheet 1 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 129-134 265-268 529-537 0x1f 0x1f 135-136 269-273 538-546 0x1e 0x1f 137-139 274-277 547-555 0x1e 0x1e 140-141 278-282 556-565 0x1d 0x1e 142-143 283-287 566-574 0x1d 0x1d 144-146 288-292 575-585 0x1c 0x1d 147-149 293-298 586-596 0x1c 0x1c 150-151 299-303 597-606 0x1b 0x1c 152-154 304-309 607-618 0x1b 0x1b 155-157 310-315 619-630 0x1a 0x1b 158-160 316-321 631-642 0x1a 0x1a 161-163 322-327 643-655 0x19 0x1a 164-167 328-334 656-669 0x19 0x19 168-170 335-341 670-682 0x18 0x19 171-174 342-348 683-697 0x18 0x18 175-178 349-356 698-712 0x17 0x18 179-182 357-364 713-728 0x17 0x17 183-186 365-372 729-744 0x16 0x17 187-190 373-381 745-762 0x16 0x16 191-195 382-390 763-780 0x15 0x16 196-199 391-399 781-799 0x15 0x15 200-204 400-409 800-819 0x14 0x15 205-210 410-420 820-840 0x14 0x14 211-215 421-431 841-862 0x13 0x14 216-221 432-443 863-885 0x13 0x13 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 222-227 444-455 886-910 0x12 0x13 228-234 456-468 911-935 0x12 0x12 235-240 469-481 936-963 0x11 0x12 241-248 482-496 964-992 0x11 0x11 249-255 497-511 993-1023 0x10 0x11 256-263 512-528 1024 0x10 0x10 table 5-5 scalar control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[7]: manual scaling select 0: disable, scaling is auto enabled when the output size is less than the input size 1: enable, scalin g is manually enabled or disabled depending on register 0x5041[5] bit[5]: manual scaling enable 0: scaling disable 1: scaling enable 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:0]: vertical scaling control (see formula) bit[5]: not used bit[4:0]: scale_ctrl1 0x3800 timing hs 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal start point[11:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:4]: not used bit[3:0]: href vertical start point[11:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x00 rw bit[7:4]: not used bit[3:0]: href horizontal endpoint[11:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x00 rw bit[7:4]: not used bit[3:0]: href vertical endpoint[11:8] table 5-4 scalar factor calculatio n matrix (sheet 2 of 2) factor1 factor2 factor3 scale_ctrl0 scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 5-11 5.5 mwb the manual white balance (mwb) provides digital gain for r, g, and b channels. ea ch channel gain is 12-bit. 0x400 is 1x gain. 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x00 rw bit[7:4]: not used bit[3:0]: isp output horizontal width[11:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x00 rw bit[7:4]: not used bit[3:0]: isp output vertical width[11:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:4]: not used bit[3:0]: horizontal offset[11:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:4]: not used bit[3:0]: vertical offset[11:8] 0x3813 timing voffs low 0x10 rw bit[7:0]: vertical offset[7:0] table 5-6 mwb control registers (sheet 1 of 2) address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 table 5-5 scalar control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.6 gain and exposure control the OV8825 does not support auto exposure control (aec) or auto gain control (agc). both exposure time and gain should be set manually from external contro l. the related registers are listed in table 5-7 . the exposure values in registers 0x3500~0x3502 are in units of 1/16th of a line. t he gain value in registers 0x 350a~0x350b support a maximum of 16x analog gain. best performance is achi eved using sensor gain (register 0x3509[4]=0). 0x3404 mwb gain04 0x04 rw bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[0]: mwb gain enable 0: disable 1: enable table 5-7 gain/exposure control registers (sheet 1 of 2) address register name default value r/w description 0x3500 expo 0x00 rw bit[3:0]: expo[19:16] 0x3501 expo 0x02 rw bit[7:0]: expo[15:8] 0x3502 expo 0x00 rw bit[7:0]: expo[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 r manual 0x00 rw bit[5]: gain delay option 0: 1 frame latch 1: delay 1 frame latch bit[4]: choose delay option 0: delay disable 1: delay enable bit[2]: gain_man_as_gain_snr 0: manual gain is real gain 1: manual gain is sensor gain bit[1:0]: debug mode table 5-6 mwb control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 5-13 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16, where n is the number of 1 in bits[9:4] and x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous table 5-7 gain/exposure control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 5.7 average (avg) the main function of avg is to average th e data channel value using special filters. table 5-8 avg control registers address register name default value r/w description 0x5041 isp ctrl41 0x04 rw bit[2]: average enable 0: disable 1: enable 0x5680 avg ctrl00 0x00 rw bit[4:0]: x start offset[12:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[4:0]: window width[12:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] 0x5686 avg ctrl06 0x0c rw bit[3:0]: window height[11:8] 0 x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 05.09.2012 product specification proprie tary to omnivision technologies 6-1 6 system control system control registers include clock, reset control, and pll configure. individual modules can be reset or clock gated by setting the appropriate registers (see table 6-1 ). table 6-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x20 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c 0x300d sc_pad_out2 0x00 rw bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[3:0]: bypass_ctrl 0x300f sc_pad_sel1 0x00 rw bit[5:0]: bypass_sel table 6-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-3 0x3010 sc_pad_sel2 0x00 rw bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s1 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s0 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 6-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x1a rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 6-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 6-5 6.1 mobile industry processor interface (mipi) mipi provides a single uni-dir ectional clock lane and one, two, and four un i-directional data lanes to communicate to components in a mobile device. each data lane has full s upport for high speed (hs) data transfer mode. contact your local omnivision fae for more details. 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 table 6-2 mipi registers (sheet 1 of 2) address register name default value r/w description 0x4800 mipi ctrl00 0x04 rw bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane table 6-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4801 mipi ctrl01 0x03 rw bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0],wc[15:8]) 1: (di[0:7],wc[0:7],wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) 0x4837 pclk period 0x15 rw bit[7:0]: period of pclk 2x, pclk_div = 1, and 1-bit decimal table 6-2 mipi registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-1 7 register tables the following tables provide descriptions of the device control registers contai ned in the OV8825. for all register enable/disable bits, enable = 1 and disable = 0. the device slave addresses are 0x6c for write and 0x6d for read. 7.1 system control [0x0100 ~ 0x0103, 0x3000 ~ 0x302a] table 7-1 system control registers (sheet 1 of 5) address register name default value r/w description 0x0100 mode_select 0x00 rw bit[7:1]: not used bit[0]: streaming setting 0: software_standby 1: streaming 0x0103 software_rst 0x00 rw bit[7:1]: not used bit[0]: software_reset 0x3000 pad_oen2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_oen bit[3]: io_sda_oen bit[2]: io_frex_oen bit[1]: io_vsync_oen bit[0]: io_shutter_oen 0x3001 not used ? ? not used 0x3002 sccb_id 0x6c rw bit[7:0]: sccb_id 0x3003 pll_ctrl0 0x8e rw pll1 control bit[7:6]: divb[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:3]: debug mode bit[2:0]: prediv[2:0] 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /4 110: /6 111: /8 0x3004 pll_ctrl1 0x04 rw pll1 control bit[7]: sclk_dac 0: sysclk from pll1 1: sysclk from pll2 bit[6:0]: divp[6:0] 129 ? divp[6:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3005 pll_ctrl2 0x10 rw pll1 control bit[7:4]: divm[3:0] divm[3:0] + 1 bit[3:0]: divs[3:0] divs[3:0] + 1 0x3006 pll_ctrl3 0x70 rw pll1 control bit[7]: r_divp 0: /8 1: /10 bit[6:4]: r_seld5 000: /1 001: /1.5 010: /2 011: /2.5 100: /3 101: /3.5 110: /4 111: /5 bit[3:0]: sdiv1[3:0] sdiv[3:0] + 1 0x3007 pll_ctrl4 0x3b rw pll2 control bit[7:3]: divp_sp[4:0] 32 ? divp_sp[4:0] bit[2]: div_sp 0: /1 1: /2 bit[1:0]: prediv 00: /1 01: /1.5 10: /2 11: /3 0x3008~ 0x3009 not used ? ? not used 0x300a chip id high byte 0x88 r chip id high byte 0x300b chip id middle byte 0x25 r chip id middle byte 0x300c chip id low byte 0x00 r chip id low byte 0x300d sc_pad_out2 0x00 rw bit[7:5]: not used bit[4]: io_stobe_o bit[3]: io_sda_o bit[2]: io_frex_o bit[1]: io_vsync bit[0]: io_shutter_o 0x300e sc_pad_sel0 0x00 rw bit[7:4]: not used bit[3:0]: bypass_ctrl table 7-1 system control registers (sheet 2 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-3 0x300f sc_pad_sel1 0x00 rw bit[7:6]: not used bit[5:0]: bypass_sel 0x3010 sc_pad_sel2 0x00 rw bit[7:5]: not used bit[4]: io_strobe_sel bit[3]: io_sda_sel bit[2]: io_frex_sel bit[1]: io_vsync_sel bit[0]: io_shutter_sel 0x3011 sc_pll_ctrl_s2 0x02 rw bit[7:3]: not used bit[2]: mipi_bit8 bit[1:0]: mipi_lane_sel 00: 1 lane 01: 2 lane 10: 4 lane 0x3012 sc_pll_ctrl_s0 0x80 rw pll1 control bit[7:6]: div124_sp[1:0] 00: /1 01: /1 10: /2 11: /4 bit[5:4]: div12_sp[1:0] 00: /1 01: /1 10: /2 11: /2.5 bit[3:0]: divs_sp[3:0] divs_sp[3:0] + 1 0x3013 sc_pll_ctrl_s1 0x39 rw bit[7]: debug mode bit[6:3]: div_dac[3:0] div_dac[3:0] + 1 bit[2:0]: debug mode 0x3014~ 0x3017 not used ? ? not used 0x3018 sc_mipi_sc_ctrl 0x18 rw bit[7:5]: not used bit[4]: r_phy_pd_mipi 0: not used 1: power down phy hs tx bit[3]: r_phy_pd_lprx 0: not used 1: power down phy lp rx module bit[3:0]: not used 0x3019 not used ? ? not used table 7-1 system control registers (sheet 3 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x301a sc_clkrst0 0x70 rw bit[7]: not used bit[6]: sclk_stb bit[5]: sclk_aec bit[4]: sclk_tc bit[3]: mipi_phy_rst_o bit[2]: rst_stb bit[1]: rst_aec bit[0]: rst_tc 0x301b sc_clkrst1 0xf0 rw bit[7]: sclk_blc bit[6]: sclk_isp bit[5]: sclk_avg bit[4]: not used bit[3]: rst_blc bit[2]: rst_isp bit[1]: rst_avg bit[0]: not used 0x301c sc_clkrst2 0xf0 rw bit[7]: not used bit[6]: sclk_mipi bit[5]: sclk_mwb_pk bit[4]: sclk_otp bit[3]: not used bit[2]: rst_mipi bit[1]: rst_mwb_pk bit[0]: rst_otp 0x301d sc_clkrst3 0xb4 rw bit[7]: sclk_asram_tst bit[6]: padclk_srb bit[5]: sclk_bist bit[4]: sclk_ac bit[3]: rst_asram_tst bit[2]: rst_srb bit[1]: rst_bist bit[0]: rst_ac 0x301e sc_clkrst4 0xf1 rw bit[7:5]: not used bit[4]: pclk_mipi bit[3:1]: not used bit[0]: daclk_o 0x301f sc_frex_rst_ mask0 0x09 rw bit[7]: frex_mask_aec bit[6]: frex_mask_blc bit[5]: frex_mask_isp bit[4]: frex_mask_dvp bit[3]: frex_mask_mipi bit[2]: not used bit[1]: frex_mask_avg bit[0]: frex_mask_mipi_phy table 7-1 system control registers (sheet 4 of 5) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-5 7.2 sccb control [0x3100 ~ 0x3106] 0x3020 sc_clock_sel 0x01 rw bit[7]: debug mode bit[6:5]: not used bit[4]: dvp_sclk_en 0: not used 1: use pll_sclk_i instead of pll_pclk_i for dvp bit[3]: pclk_sel bit[2:1]: sclk_sel bit[0]: not used 0x3021 sc_misc_ctrl 0x03 rw bit[7:6]: not used bit[5]: dac_sclk_en bit[4:1]: not used bit[0]: cen_global_o 0x3022 sc_sram_tst 0x00 rw sc_sram_tst 0x3023 sc_sram_val0 0xff rw sc_sram_val0 0x3024 sc_sram_val1 0x09 rw sc_sram_val1 0x302a sensor revision ? r bit[7:0]: sensor revision control 0xb0: rev 1a 0xb1: rev 1b 0xb2: rev 1c table 7-2 sccb registers (sheet 1 of 2) address register name default value r/w description 0x3100 sccb_ctrl0 0x00 rw not used 0x3101 sccb_ctrl1 0x12 rw bit[7:5]: not used bit[4]: en_ss_addr_inc bit[3:0]: debug mode 0x3102 sccb_ctrl2 0x00 rw bit[7:0]: debug mode 0x3103 not used ? ? not used table 7-1 system control registers (sheet 5 of 5) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.3 context switching [0x3200 ~ 0x320f] 0x3104 sccb_pll 0x20 rw bit[7]: not used bit[6]: sda_vblank bit[5]: r_sys_sel (sclk) 0: pll2_daclk 1: pll1_sclk bit[4]: r_dac_sel (sen_clk) 0: pll2_daclk 1: pll1_sclk bit[3]: r_daclk (dacclk) 0: pll2_daclk 1: pll1_sclk bit[2:0]: debug mode 0x3105 not used ? ? not used 0x3106 srb_ctrl 0x15 rw bit[7:6]: not used bit[5:0]: debug mode table 7-3 context switching registers (sheet 1 of 2) address register name default value r/w description 0x3200 group_addr0 0x00 rw grp_group_addr0 0x3201 group_addr1 0x10 rw grp_group_addr1 0x3202 group_addr2 0x1f rw grp_group_addr2 0x3203 group_addr3 0x1f rw grp_group_addr3 0x3204 group_leng0 0x00 rw grp_group_leng0 0x3205 group_leng1 0x00 rw grp_group_leng1 0x3206 group_leng2 0x00 rw grp_group_leng2 0x3207 group_leng3 0x00 rw grp_group_leng3 table 7-2 sccb registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-7 0x3208 group access ? w bit[[7:4]: group_ctrl 0000: group hold start 0001: group hold end 1010: group launch others: reserved bit[[3:0]: group_id 0000: group bank 0, default start from address 0x00 0001: group bank 1, default start from address 0x40 0010: group bank 2, default start from address 0x80 0011: group bank 3, default start from address 0xb0 others: reserved 0x3209 grp0_period 0x00 rw frames for staying in grp0 0x320a grp1_period 0x00 rw frames for staying in grp1 0x320b grp_swctrl 0x01 rw bit[7:6]: not used bit[5]: grp0_start_opt bit[4]: frame_cnt_trig bit[3]: group_switch_repeat bit[2]: context_en bit[1:0]: second group selection 0x320c grp_sram 0x0a rw bit[7:5]: not used bit[4]: test_srm bit[3:0]: sram_rm 0x320d grp_act ? r indicates which group is active 0x320e frame_cnt_grp0 ? r frame_cnt_grp0 0x320f frame_cnt_grp1 ? r frame_cnt_grp1 table 7-3 context switching registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.4 mwb control [0x3400 ~ 0x3406] table 7-4 mwb control registers address register name default value r/w description 0x3400 mwb gain00 0x04 rw bit[7:4]: not used bit[3:0]: mwb red gain[11:8] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3401 mwb gain01 0x00 rw bit[7:0]: mwb red gain[7:0] digital gain in red channel red gain = mwb red gain[11:0] / 0x400 0x3402 mwb gain02 0x04 rw bit[7:4]: not used bit[3:0]: mwb green gain[11:8] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3403 mwb gain03 0x00 rw bit[7:0]: mwb green gain[7:0] digital gain in green channel green gain = mwb green gain[11:0] / 0x400 0x3404 mwb gain04 0x04 rw bit[7:4]: not used bit[3:0]: mwb blue gain[11:8] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3405 mwb gain05 0x00 rw bit[7:0]: mwb blue gain[7:0] digital gain in blue channel blue gain = mwb blue gain[11:0] / 0x400 0x3406 mwb gain06 0x00 rw bit[7:1]: not used bit[0]: manually write mwb gain 0: auto 1: manual 05.09.2012 product specification proprie tary to omnivision technologies 7-9 7.5 manual aec/agc [0x3500 ~ 0x350f] table 7-5 manual aec/agc registers (sheet 1 of 2) address register name default value r/w description 0x3500 aec expo 0x00 rw aec peak exposure bit[7:4]: not used bit[3:0]: exposure[19:16] 0x3501 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[15:8] 0x3502 aec expo 0x00 rw aec peak exposure bit[7:0]: exposure[7:0] low 4 bits are fraction bits which are not supported and should always be 0. 0x3503 aec manual 0x00 rw aec manual mode control bit[7:6]: not used bit[5:4]: gain delay option x0: gain has no delay 01: gain delay to next frame 11: gain delay two frames bit[3]: not used bit[2]: vts manual enable 0: auto enable 1: manual enable bit[1]: agc manual enable 0: auto enable 1: manual enable bit[0]: aec manual enable 0: auto enable 1: manual enable 0x3504 man gain 0x00 rw bit[7:2]: not used bit[1:0]: man gain[9:8] 0x3505 man gain 0x00 rw bit[7:0]: man gain[7:0] 0x3506 add vts 0x00 rw bit[7:0]: add dummy lines vts[15:8] 0x3507 add vts 0x00 rw bit[7:0]: add dummy lines vts[7:0] 0x3508 not used ? ? not used color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.6 analog and vcm control [0x3600 ~ 0x361e] 0x3509 aec09 0x10 rw aec manual mode control bit[7:5]: not used bit[4]: sensor gain convert enable 0: use sensor gain, {0x350a, 0x350b} is sensor gain, 0x00 is 1x gain 1: use real gain, {0x350a, 0x350b} is real gain, 0x10 is 1x gain bit[3]: gain manual enable 0: manual disable, use register 0x350a/0x350b 1: manual enable, use register 0x3504/0x3505 bit[2:0]: not used 0x350a aec agc adj 0x00 rw gain output to sensor bit[7:3]: not used bit[0]: gain[10:8] 0x350b aec agc adj 0x10 rw gain output to sensor bit[7:0]: gain[7:0] when 0x3509[4] = 0, this gain is sensor gain. real gain = 2^n(16+x)/16. n is the number of 1 in bits[9:4]. x is the low bits[3:0]. when 0x3509[4] = 1, this gain is real gain. the low 4 bits are fraction bits. note: real gain is non-continuous. 0x350c~ 0x350f not used ? ? not used table 7-6 analog and vcm registers (sheet 1 of 3) address register name default value r/w description 0x3600 anactrl0 0x04 rw analog control register 0x3601 anactrl1 0x15 rw analog control register 0x3602 anactrl2 0x57 rw analog control register 0x3603 anactrl3 0x20 rw analog control register table 7-5 manual aec/agc registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-11 0x3604 anactrl4 0x90 rw analog control register 0x3605 anactrl5 0x11 rw analog control register 0x3606 anactrl6 0x02 rw analog control register 0x3607 anactrl7 0x02 rw analog control register 0x3608 anactrl8 0x00 rw bit[7]: analog control bit[6]: bp_regulator bit[5:0]: analog control 0x3609 anactrl9 0xb8 rw analog control register 0x360a anactrla 0x84 rw analog control register 0x360b anactrlb 0x3c rw analog control register 0x360c anactrlc 0x0c rw analog control register 0x360d anactrld 0x00 rw analog control register 0x360e anactrle 0x00 rw analog control register 0x360f anactrlf 0x48 rw analog control register 0x3610 anactrl10 0x00 rw analog control register 0x3611 anactrl11 0x00 rw analog control register 0x3612 anactrl12 0x03 rw bit[7]: analog control bit[6:5]: pad i/o drive capability 00: 1x 01: 2x 10: 3x 11: 4x bit[4:3]: reserved bit[2:1]: not used bit[0]: analog control 0x3613 anactrl13 0x04 rw analog control register 0x3614 anactrl14 0xff rw analog control register 0x3615 anactrl15 0x00 rw analog control register 0x3616 anactrl16 0x03 rw analog control register 0x3617 anactrl17 0x01 rw analog control register 0x3618 a_vcm_low 0x00 rw bit[7:4]: din[3:0] bit[3]: s3 bit[2:0]: s[2:0] table 7-6 analog and vcm registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x3619 a_vcm_mid0 0x00 rw bit[7]: pdin bit[6]: rv14 bit[5:0]: din[9:4] 0x361a a_vcm_mid1 0x00 rw bit[7:0]: rdiv[7:0] 0x361b a_vcm_mid2 0x00 rw bit[7]: rmsb_inv 0: normal 1: switch a_vcm_low and a_vcm_mid0 bit[6]: rs14 bit[5]: rs13 bit[4]: vcm_rih_o bit[3:0]: rdiv[11:8] 0x361c a_vcm_high 0x00 rw bit[7:3]: not used bit[2:0]: vcm output current control 000: 0.71 * id 001: 0.77 * id 010: 0.83 * id 011: 0.91 * id 100: 1.00 * id 101: 1.11 * id 110: 1.25 * id 111: 1.43 * id 0x361d anactrl1d 0x00 rw analog control register 0x361e anactrl1e 0x00 rw bit[7]: vsync_polarity 0: vsync output is low in active pixel period 1: vsync output is high in active pixel period bit[6:4]: debug mode bit[3]: not used bit[2:0]: debug mode table 7-6 analog and vcm registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-13 7.7 sensor control [0x3700 ~ 0x3712] table 7-7 sensor control registers address register name default value r/w description 0x3700 senctrl0 0x20 rw sensor control register 0x3701 senctrl1 0x44 rw sensor control register 0x3702 senctrl2 0x50 rw sensor control register 0x3703 senctrl3 0xbc rw sensor control register 0x3704 senctrl4 0xf9 rw sensor control register 0x3705 senctrl5 0x14 rw sensor control register 0x3706 senctrl6 0x4b rw sensor control register 0x3707 senctrl7 0x62 rw sensor control register 0x3708 senctrl8 0x81 rw sensor control register 0x3709 senctrl9 0x41 rw sensor control register 0x370a senctrla 0x12 rw sensor control register 0x370b senctrlb 0x00 rw sensor control register 0x370c senctrlc 0x10 rw sensor control register 0x370d senctrld 0x00 rw sensor control register 0x370e senctrle 0x00 rw sensor control register 0x370f senctrlf 0x00 rw sensor control register 0x3710 senctrl10 0x02 rw sensor control register 0x3711 senctrl11 0x04 rw sensor control register 0x3712 senctrl12 0x3c rw sensor control register color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.8 timing control [0x3800 ~ 0x382a] table 7-8 timing control registers (sheet 1 of 3) address register name default value r/w description 0x3800 timing hs 0x00 rw bit[7:5]: not used bit[4:0]: href horizontal start point[12:8] 0x3801 timing hs 0x00 rw bit[7:0]: href horizontal start point[7:0] 0x3802 timing vs 0x00 rw bit[7:5]: not used bit[4:0]: href vertical start point[12:8] 0x3803 timing vs 0x00 rw bit[7:0]: href vertical start point[7:0] 0x3804 timing hw 0x0c rw bit[7:5]: not used bit[4:0]: href horizontal endpoint[12:8] 0x3805 timing hw 0xdf rw bit[7:0]: href horizontal endpoint[7:0] 0x3806 timing vh 0x09 rw bit[7:5]: not used bit[4:0]: href vertical endpoint[12:8] 0x3807 timing vh 0x9b rw bit[7:0]: href vertical endpoint[7:0] 0x3808 timing ispho 0x0c rw bit[7:5]: not used bit[4:0]: isp output horizontal width[12:8] 0x3809 timing ispho 0xc0 rw bit[7:0]: isp output horizontal width[7:0] 0x380a timing ispvo 0x09 rw bit[7:5]: not used bit[4:0]: isp output vertical width[12:8] 0x380b timing ispvo 0x90 rw bit[7:0]: isp output vertical width[7:0] 0x380c timing hts 0x0e rw bit[7:0]: total horizontal size[15:8] 0x380d timing hts 0x70 rw bit[7:0]: total horizontal size[7:0] 0x380e timing vts 0x09 rw bit[7:0]: total vertical size[15:8] 0x380f timing vts 0xb0 rw bit[7:0]: total vertical size[7:0] 0x3810 timing hoffs high 0x00 rw bit[7:5]: not used bit[4:0]: horizontal offset[12:8] 0x3811 timing hoffs low 0x10 rw bit[7:0]: horizontal offset[7:0] 0x3812 timing voffs high 0x00 rw bit[7:5]: not used bit[4:0]: vertical offset[12:8] 0x3813 timing voffs low 0x06 rw bit[7:0]: vertical offset[7:0] 0x3814 timing x inc 0x11 rw bit[7:4]: x_odd_inc bit[3:0]: x_even_inc 05.09.2012 product specification proprie tary to omnivision technologies 7-15 0x3815 timing y inc 0x11 rw bit[7:4]: y_odd_inc bit[3:0]: y_even_inc 0x3816 timing hsync start high 0x00 rw bit[7:0]: hsync_start[15:8] 0x3817 timing hsync start low 0x00 rw bit[7:0]: hsync_start[7:0] 0x3818 timing hsync end high 0x00 rw bit[7:0]: hsync_end[15:8] 0x3819 timing hsync end low 0x00 rw bit[7:0]: hsync_end[7:0] 0x381a timing hsync first high 0x00 rw bit[7:0]: hsync_first[15:8] 0x381b timing hsync first low 0x00 rw bit[7:0]: hsync_first[7:0] 0x381c timing thn x output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_x_output_size[12:8] 0x381d timing thn x output size low 0x00 rw bit[7:0]: thn_x_output_size[7:0] 0x381e timing thn y output size high 0x00 rw bit[7:5]: not used bit[4:0]: thn_y_output_size[12:8] 0x381f timing thn y output size low 0x00 rw bit[7:0]: thn_y_output_size[7:0] 0x3820 timing reg20 0x00 rw bit[7]: vsub48_blc bit[6]: vflip_blc bit[5:3]: debug mode bit[2]: vflip_dig bit[1]: vflip_arr bit[0]: vbin 0x3821 timing reg21 0x00 rw bit[7]: hdr_en bit[6]: thn_en bit[5]: jpeg_en bit[4:3]: debug mode bit[2]: mirr_dig bit[1]: mirr_arr bit[0]: hbin 0x3822 timing reg22 0x48 rw bit[7:0]: debug mode 0x3823 timing reg23 0x40 rw bit[7:0]: debug mode 0x3824 timing reg24 0x00 rw bit[7:0]: debug mode table 7-8 timing control registers (sheet 2 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.9 strobe control [0x3b00 ~ 0x3b20] 0x3825 timing reg25 0x00 rw bit[7:0]: debug mode 0x3826 timing reg26 0x00 rw bit[7:0]: debug mode 0x3827 timing reg27 0x00 rw bit[7:0]: debug mode 0x3828 timing reg28 0x0b rw bit[7:0]: debug mode 0x3829 timing reg29 0x00 rw bit[7:1]: not used bit[0]: debug mode 0x382a timing xhs ctrl 0x10 rw bit[7:6]: not used bit[5]: xhs_polarity bit[4:0]: xhs_width table 7-9 strobe control registers (sheet 1 of 2) address register name default value r/w description 0x3b00 strobe ctrl00 0x00 rw bit[7]: strobe request on/off bit[6]: strobe polarity 0: active high 1: active low bit[5:4]: pulse width in xenon mode bit[3]: not used bit[2:0]: strobe mode select 000: xenon 011: led1 100: led2 0x3b01 strobe ctrl01 0x00 rw bit[7:4]: not used bit[3]: start_point_sel bit[2]: strobe repeat enable bit[1:0]: strobe latency 00: strobe generated at next frame 01: delay one frame, strobe generated 2 frames later 10: delay one frame, strobe generated 3 frames later 11: delay one frame, strobe generated 4 frames later table 7-8 timing control registers (sheet 3 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-17 0x3b02 strobe ctrl02 0x00 rw bit[7:2]: strobe pulse width step bit[1:0]: strobe pulse width gain strobe pulse width = 128 (2**gain) (step+1) sclk_period 0x3b03~ 0x3b04 not used ? ? not used 0x3b05 frex ctrl 00 0x00 rw bit[7:0]: frex_exp[23:16] 0x3b06 frex ctrl 01 0x00 rw bit[7:0]: frex_exp[15:8] 0x3b07 frex ctrl 02 0x00 rw bit[7:0]: frex_exp[7:0] 0x3b09 frex ctrl 04 0x00 rw bit[7:4]: not used bit[3:0]: strobe_width[19:16] 0x3b0a frex ctrl 05 0x00 rw bit[7:0]: strobe_width[15:8] 0x3b0b frex ctrl 06 0x00 rw bit[7:0]: strobe_width[7:0] 0x3b0c frex ctrl 07 0x00 rw bit[7:5]: not used bit[4:0]: shutter_dly[12:8] 0x3b0d frex ctrl 08 0x00 rw bit[7:0]: shutter_dly[7:0] 0x3b0e frex ctrl 09 0x01 rw bit[7:0]: frex_pchg_width[15:8] 0x3b0f frex ctrl 0a 0x00 rw bit[7:0]: frex_pchg_width[7:0] 0x3b10 frex ctrl 0b 0x00 rw bit[7:0]: datout_dly[15:8] 0x3b11 frex ctrl 0c 0x00 rw bit[7:0]: datout_dly[7:0] 0x3b12~ 0x3b1e not used ? ? not used 0x3b1f frex ctrl 0d 0x04 rw bit[7]: not used bit[6]: frex_sccb_req_repeat bit[5]: frex_strobe_out_sel bit[4]: frex_nopchg bit[3]: frex_strobe_pol 0: active high 1: active low bit[2]: frex_shutter_pol bit[1]: frex_sel 0: internal frex 1: external frex bit[0]: no_latch 0x3b20 frex ctrl 0e 0x00 rw bit[7:1]: not used bit[0]: frex_repeat_trig table 7-9 strobe control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.10 otp control [0x3d80 ~ 0x3dn] 7.11 psram [0x3f00 ~ 0x3f07] changing these register values is not recommended. table 7-10 otp control registers address register name default value r/w description 0x3d80 otp dump / program 0x00 rw bit[7:1]: not used bit[0]: program otp 0x3d81 otp dump / program ? r bit[7]: load_o bit[6:1]: not used bit[0]: load / dump otp 0x3d82 otp dump / program 0x7d rw bit[7:0]: pgm_pulse 0x3d83 otp dump / program 0x05 rw bit[7:0]: load_pulse 0x3d84 otp dump / program 0x00 rw bit[7:5]: not used bit[4]: pgm_dis bit[3]: bank mode enable bit[2:0]: bank index 0x3d85 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: start_address 0x3d86 otp dump / program 0x03 rw bit[7:6]: not used bit[5:0]: end_address 0x3d87 otp dump / program 0x06 rw bit[7:4]: not used bit[3:0]: r_ps2cs 0x3d0n (n<0x10) 0x3dn (0x20>n>0x0f) otp data ?n? 0x00 rw bit[7:0]: data dumped or data to be programmed for bit[8*(n+1)-1:8*n] table 7-11 psram registers (sheet 1 of 2) address register name default value r/w description 0x3f00 psram_ctrl0 0x00 rw bit[7:2]: not used bit[1]: internal clock option bit[0]: psram control 0x3f01 psram_ctrl1 0xf0 rw psram control register 0x3f02 psram_ctrl2 0x06 rw psram control register 05.09.2012 product specification proprie tary to omnivision technologies 7-19 7.12 blc control [0x4000 ~ 0x44013] 0x3f03 psram_ctrl3 0x66 rw psram control register 0x3f04 psram_ctrl4 0x00 rw psram control register 0x3f05 psram_ctrl5 0x00 rw psram control register 0x3f06 psram_ctrl6 0x00 rw psram control register 0x3f07 psram_ctrl7 0x00 rw psram control register table 7-12 blc control registers (sheet 1 of 3) address register name default value r/w description 0x4000 blc ctrl00 0x29 rw bit[7]: blc bypass enable 0: disable 1: enable bit[6:4]: blc control 0: disable 1: enable bit[3]: not used bit[2]: apply to black line 0: disable 1: enable bit[1]: black line average frame 0: disable 1: enable bit[0]: blc control 0x4001 blc ctrl01 0x02 rw bit[7:6]: not used bit[5:0]: blc start line 0x4002 blc ctrl02 0x45 rw bit[7]: format change enable 0: blc remains the same after format change 1: blc will redo after format change bit[6]: blc auto enable 0: blc offset from manual register 1: blc offset from auto statistics bit[5:0]: reset frame number[5:0] table 7-11 psram registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4003 blc ctrl03 0x08 rw bit[7]: blc redo enable 0: normal 1: blc will redo n frames where n = 0x4003[5:0] bit[6]: freeze enable 0: normal 1: blc and even offsets will not update priority lower than always update bit[5:0]: manual frame number blc redo frame number 0x4004 blc ctrl04 0x04 rw bit[7:6]: not used bit[5:0]: blc_line_num number of black lines used 0x4005 blc ctrl05 0x18 rw bit[7:5]: debug mode bit[4]: do not output black line 0: output black line 1: no black line output bit[3]: blc_man_1_en apply one channel offset (registers 0x400c , 0x400d ) to all manual blc channels bit[2]: debug mode bit[1]: blc_always_up_en 0: blc will freeze several frames after reset priority higher than freeze enable 1: blc always update bit[0]: debug mode 0x4006 not used ? ? not used 0x4007 blc ctrl07 0x00 rw bit[7:0]: debug mode 0x4008 blc target 0x00 rw bit[7:2]: not used bit[1:0]: black level target[9:8] 0x4009 blc target 0x10 rw bit[7:0]: black level target[7:0] 0x400a~ 0x400b not used ? ? not used 0x400c blc ctrl0c 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 0[11:8] 0x400d blc ctrl0d 0x00 rw bit[7:0]: blc manual offset channel 0[7:0] 0x400e blc ctrl0e 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 1[11:8] 0x400f blc ctrl0f 0x00 rw bit[7:0]: blc manual offset channel 1[7:0] 0x4010 blc ctrl10 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 2[11:8] table 7-12 blc control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-21 7.13 frame control [0x4200 ~ 0x4203] 7.14 format control [0x4300 ~ 0x430f] 0x4011 blc ctrl11 0x00 rw bit[7:0]: blc manual offset channel 2[7:0] 0x4012 blc ctrl12 0x00 rw bit[7:4]: not used bit[3:0]: blc manual offset channel 3[11:8] 0x4013 blc ctrl13 0x00 rw bit[7:0]: blc manual offset channel 3[7:0] table 7-13 frame control registers address register name default value r/w description 0x4200 fc ctrl00 0x00 rw bit[7:3]: not used bit[2:0]: debug mode 0x4201 fc ctrl01 0x00 rw bit[7:4]: not used bit[3:0]: frame_on_number 0x4202 fc ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: frame_off_number 0x4203 fc ctrl03 0x00 rw bit[7]: not used bit[6:0]: debug mode table 7-14 format control registers (sheet 1 of 3) address register name default value r/w description 0x4300 max value 0xff rw bit[7:0]: max clip value[9:2] 0x4301 min value 0x00 rw bit[7:0]: min clip value[9:2] 0x4302 max/min value 0x0c rw bit[7:4]: not used bit[3:2]: max clip value[1:0] bit[1:0]: min clip value[1:0] table 7-12 blc control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4303 fmt_ctrl3 0x00 rw bit[7]: r_inc_en bit[6]: r_inc_pattern bit[5]: r_pad_lsb bit[4]: r_bar_mux bit[3]: r_bar_en bit[2]: r_bit_tst_en bit[1]: r_tst_bit8 bit[0]: r_bit_tst_md 0x4304 fmt_ctrl4 0x08 rw bit[7:5]: not used bit[4]: data_swap 0: normal data output 1: output {data[7:0], data[9:8]} bit[3]: tst_full_win 0: test pattern in user-defined window 0x4308~0x0430f 1: test pattern in full window bit[2:0]: bar_pad 0x4305 fmt_pad_low1 0x40 rw bit[7:6]: pad99 bit[5:4]: pad66 bit[3:2]: pad33 bit[1:0]: pad00 0x4306 fmt_pad_low2 0x0e rw bit[7:4]: not used bit[3:2]: padff bit[1:0]: padcc 0x4307 embeded_ctrl 0x31 rw bit[7:4]: embed_line_st bit[3]: embed_start_man bit[2]: dpc_threshold_opt 0: for white pixel 1: for black pixel bit[1]: embed_byte_order bit[0]: embedded_en 0x4308 fmt_tst_x_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_x_start[10:7] 0x4309 fmt_tst_x_start_low 0x00 rw bit[7:1]: tst_x_start[6:0] bit[0]: vsync mode 0: mode 1 1: mode 2 0x430a fmt_tst_y_start_high 0x00 rw bit[7:4]: not used bit[3:0]: tst_y_start[10:7] 0x430b fmt_tst_y_start_low 0x00 rw bit[7:1]: tst_y_start[6:0] bit[0]: not used table 7-14 format control registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-23 7.15 vfifo control [0x4600 ~ 0x4604] 0x430c fmt_tst_width_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_width[10:8] 0x430d fmt_tst_width_low 0x00 rw bit[7:0]: tst_width[7:0] 0x430e fmt_tst_height_high 0x00 rw bit[7:3]: not used bit[2:0]: tst_height[10:8] 0x430f fmt_tst_height_low 0x00 rw bit[7:0]: tst_height[7:0] table 7-15 vfifo control registers address register name default value r/w description 0x4600 vfifo_ctrl0 0x14 rw bit[7:6]: not used bit[5]: start_1_line delay bit[4]: more_auto_en 0: use 0x4601/0x4602 1: auto mode bit[3:0]: debug mode 0x4601 vfifo_read_st_high 0x14 rw bit[7:3]: not used bit[2:0]: read_start[10:8] 0x4602 vfifo_read_st_low 0x00 rw bit[7:0]: read_start[7:0] 0x4603 vfifo_ctrl3 0x0a rw bit[7:5]: not used bit[4:0]: debug mode 0x4604 vfifo_pclk_div_man 0x01 rw bit[7:6]: not used bit[5:0]: debug mode table 7-14 format control registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.16 mipi control [0x4800 ~ 0x485f] table 7-16 mipi control registers (sheet 1 of 9) address register name default value r/w description 0x4800 mipi ctrl 00 0x04 rw mipi control 00 bit[7:6]: not used bit[5]: clock lane gate enable 0: clock lane is free running 1: gate clock lane when there is no packet to transmit bit[4]: line sync enable 0: do not send line short packet for each line 1: send line short packet for each line bit[3]: lane select 0: use lane1 as default data lane 1: use lane2 as default data lane bit[2]: idle_sts 0: mipi bus will be lp00 when there is no packet to transmit 1: mipi bus will be lp11 when there is no packet to transmit bit[1:0]: debug mode 0x4801 mipi ctrl 01 0x03 rw mipi control 01 bit[7]: long packet data type manual enable 0: use mipi data 1: use dt man o as long packet data bit[6:5]: spkt_dt_sel 1: use dt_spkt as short packet data (0x4812/0x4813) bit[4]: ph bit order for ecc 0: (di[7:0],wc[7:0], wc[15:8]) 1: (di[0:7],wc[0:7], wc[8:15]) bit[3]: ph byte order for ecc 0: (di,wc l,wc h) 1: (di,wc h,wc l) bit[2]: ph byte order2 for ecc 0: (di,wc) 1: (wc,di) bit[1:0]: debug mode 05.09.2012 product specification proprie tary to omnivision technologies 7-25 0x4802 mipi ctrl 02 0x00 rw mipi control 02 bit[7]: hs_prepare select 0: auto calculate t_hs_prepare, unit is pclk2x 1: use hs_prepare_min_o[7:0] bit[6]: clk_prepare select 0: auto calculate t_clk_prepare, unit is pclk2x 1: use clk_prepare_min_o[7:0] bit[5]: clk_post select 0: auto calculate t_clk_post, unit is pclk2x 1: use clk_post_min_o[7:0] bit[4]: clk_trail select 0: auto calculate t_clk_trail, unit is pclk2x 1: use clk_trail_min_o[7:0] bit[3]: hs_exit select 0: auto calculate t_hs_exit, unit is pclk2x 1: use hs_exit_min_o[7:0] bit[2]: hs_zero select 0: auto calculate t_hs_zero, unit is pclk2x 1: use hs_zero_min_o[7:0] bit[1]: hs_trail select 0: auto calculate t_hs_trail, unit is pclk2x 1: use hs_trail_min_o[7:0] bit[0]: clk_zero select 0: auto calculate t_clk_zero, unit is pclk2x 1: use clk_zero_min_o[7:0] 0x4803 mipi ctrl 03 0x50 rw bit[7:0]: debug mode 0x4804 mipi ctrl 04 0x8d rw bit[7:0]: debug mode table 7-16 mipi control registers (sheet 2 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4805 mipi ctrl 05 0x10 rw mipi control 05 bit[7]: lane_disable2 1: disable mipi data lane1, lane1 will be lp00 bit[6]: lane_disable1 1: disable mipi data lane2, lane2 will be lp00 bit[5]: lpx_p_sel 0: auto calculate t_lpx_o in pclk2x domain, unit clk2x 1: use lp_p_min[7:0] bit[4]: lp_rx_intr_sel 0: send lp_rx_intr_o as the first byte 1: send lp_rx_intr_o at the end of receiving bit[3:1]: debug mode bit[0]: not used 0x4806 mipi ctrl06 0x88 rw bit[7:0]: debug mode 0x4807 mipi ctrl07 0xa0 rw bit[7:0]: debug mode 0x4808 mipi ctrl08 0x02 rw bit[7:0]: debug mode 0x4809 mipi ctrl09 0x01 rw bit[7:0]: debug mode 0x4810 mipi fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[15:8] 0x4811 mipi_fcnt max 0xff rw bit[7:0]: max frame counter of frame sync short packet[7:0] 0x4812 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[15:8] 0x4813 mipi spkt wc reg 0x00 rw bit[7:0]: short packet word counter[7:0] 0x4814 mipi ctrl14 0x2a rw mipi control 14 bit[7:6]: vc mipi virtual channel bit[5:0]: dt_man manual data type 0x4815 mipi dt spkt 0x00 rw bit[7]: not used bit[6]: debug mode bit[5:0]: manual data type for short packet 0x4816~ 0x4817 not used ? ? not used 0x4818 mipi hs zero min 0x00 rw bit[7:2]: not used bit[1:0]: hs_zero_min[9:8] high byte of minimum value of hs_zero, unit ns table 7-16 mipi control registers (sheet 3 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-27 0x4819 mipi hs zero min 0x96 rw bit[7:0]: hs_zero_min[7:0] low byte of minimum value of hs_zero hs_zero_real = hs_zero_min_o + tui ui_hs_zero_min_o 0x481a mipi hs trail min 0x00 rw bit[7:2]: not used bit[1:0]: hs_trail_min[9:8] high byte of minimum value of hs_trail, unit ns 0x481b mipi hs trail min 0x3c rw bit[7:0]: hs_trail_min[7:0] low byte of minimum value of hs_trail hs_trail_real = hs_trail_min_o + tui ui_hs_trail_min_o 0x481c mipi clk zero min 0x01 rw bit[7:2]: not used bit[1:0]: clk_zero_min[9:8] high byte of minimum value of clk_zero, unit ns 0x481d mipi clk zero min 0x1c rw bit[7:0]: clk_zero_min[7:0] low byte of minimum value of clk_zero clk_zero_real = clk_zero_min_o + tui ui_clk_zero_min_o 0x481e mipi clk prepare min 0x00 rw bit[7:2]: not used bit[1:0]: clk_prepare_min[9:8] high byte of minimum value of clk_prepare, unit ns 0x481f mipi clk prepare min 0x3c rw bit[7:0]: clk_prepare_min[7:0] low byte of minimum value of clk_prepare clk_prepare_real = clk_prepare_min_o + tui ui_clk_prepare_min_o 0x4820 mipi clk post min 0x00 rw bit[7:2]: not used bit[1:0]: clk_post_min[9:8] high byte of minimum value of clk_post, unit ns 0x4821 mipi clk post min 0x56 rw bit[7:0]: clk_post_min[7:0] low byte of minimum value of clk_post clk_post_real = clk_post_min_o + tui ui_clk_post_min_o table 7-16 mipi control registers (sheet 4 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x4822 mipi clk trail min 0x00 rw bit[7:2]: not used bit[1:0]: clk_trail_min[9:8] high byte of minimum value of clk_trail, unit ns 0x4823 mipi clk trail min 0x3c rw bit[7:0]: clk_trail_min[7:0] low byte of minimum value of clk_trail clk_trail_real = clk_trail_min_o + tui ui_clk_trail_min_o 0x4824 mipi lpx pclk min 0x00 rw bit[7:2]: not used bit[1:0]: lpx_p_min[9:8] high byte of minimum value of lpx_p, unit ns 0x4825 mipi lpx pclk min 0x32 rw bit[7:0]: lpx_p_min[7:0] low byte of minimum value of lpx_p lpx_p_real = lpx_p_min_o + tui ui_lpx_p_min_o 0x4826 mipi hs prepare min 0x00 rw bit[7:2]: not used bit[1:0]: hs_prepare_min[9:8] high byte of minimum value of hs_prepare, unit ns 0x4827 mipi hs prepare min 0x32 rw bit[7:0]: hs_prepare_min[7:0] low byte of minimum value of hs_prepare hs_prepare_real = hs_prepare_min_o + tui ui_hs_prepare_min_o 0x4828 mipi hs exit min 0x00 rw bit[7:2]: not used bit[1:0]: hs_exit_min[9:8] high byte of minimum value of hs_exit, unit ns 0x4829 mipi hs exit min 0x64 rw bit[7:0]: hs_exit_min[7:0] low byte of minimum value of hs_exit hs_exit_real = hs_exit_min_o + tui ui_hs_exit_min_o 0x482a mipi ui hs zero min 0x05 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_zero, unit ui 0x482b mipi ui hs trail min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_trail, unit ui 0x482c mipi ui clk zero min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_zero, unit ui 0x482d mipi ui clk prepare min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_prepare, unit ui table 7-16 mipi control registers (sheet 5 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-29 0x482e mipi ui clk post min 0x34 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_post, unit ui 0x482f mipi ui clk trail min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of clk_trail, unit ui 0x4830 mipi ui lpx p min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of lpx_p (pclk2x domain), unit ui 0x4831 mipi ui hs prepare min 0x04 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_prepare, unit ui 0x4832 mipi ui hs exit min 0x00 rw bit[7:6]: not used bit[5:0]: minimum ui value of hs_exit, unit ui 0x4833 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[15:8] mipi register address minimum value 0x4834 mipi reg min 0x00 rw bit[7:0]: mipi_reg_min[7:0] mipi register address minimum value 0x4835 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[15:8] mipi register address maximum value 0x4836 mipi reg max 0xff rw bit[7:0]: mipi_reg_max[7:0] mipi register address maximum value 0x4837 mipi pclk period 0x15 rw bit[7:0]: period of pclk2x, pclk_div = 1, and 1-bit decimal 0x4838 mipi wkup dly 0x02 rw bit[7:6]: not used bit[5:0]: wakeup delay for mipi (mark1 state) / 2 12 0x4839 not used ? ? not used 0x483a mipi dir dly 0x08 rw bit[7:6]: not used bit[5:0]: debug mode table 7-16 mipi control registers (sheet 6 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x483b mipi lp gpio 0x33 rw bit[7]: lp_sel1 0: auto generate mipi_lp_dir1_o 1: use lp_dir_man1 and lp_p1_o/lp_n1_o (bit[6:4]) to control lane 1 status in software standby mode bit[6]: lp_dir_man1 0: input 1: output bit[5]: lp_p1_o bit[4]: lp_n1_o bit[3]: lp_sel2 0: auto generate mipi_lp_dir2_o 1: use lp_dir_man2 and lp_p2_o/lp_n2_o (bit[2:0]) to control lane 2 status in software standby mode bit[2]: lp_dir_man2 0: input 1: output bit[1]: lp_p2_o bit[0]: lp_n2_o 0x483c mipi ctrl 33 0x42 rw bit[7:0]: debug mode 0x483d mipi t ta go 0x10 rw bit[7:0]: debug mode 0x483e mipi t ta sure 0x06 rw bit[7:0]: debug mode 0x483f mipi t ta get 0x14 rw bit[7:0]: debug mode 0x4840 start offset 0x00 rw bit[7:0]: debug mode 0x4841 start offset 0x00 rw bit[7:0]: debug mode 0x4842 start mode 0x01 rw bit[7:0]: debug mode 0x4843 snr pclk div 0x00 rw bit[7:2]: not used bit[1]: pclk_div_man global timing control unit 0: auto calculated pclk divider 1: manually set pclk divider bit[0]: not used 0x4844 0x4849 not used ? ? not used table 7-16 mipi control registers (sheet 7 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-31 0x484a mipi ctrl4a 0x00 rw mipi control 4a bit[7]: prbs te s t m o d e bit[6]: lane_disable4 1: disable mipi data lane4, lane4 will be lp00 bit[5]: lane_disable3 1: disable mipi data lane3, lane3 will be lp00 bit[4]: mipi_test 1: mip output uses 0x484d, 0x484e, 0x484f, 0x485a, 0x485b values bit[3:0]: debug mode 0x484b mipi ctrl4b 0x33 rw mipi control 4b bit[7]: lp_sel3 0: auto generate mipi_lp_dir3_o 1: use lp_dir_man3 and lp_p3_o/lp_n3_o (bit[6:4]) to control lane 3 status in software standby mode bit[6]: lp_dir_man3 0: input 1: output bit[5]: lp_p3_o bit[4]: lp_n3_o bit[3]: lp_sel4 0: auto generate mipi_lp_dir4_o 1: use lp_dir_man4 and lp_p4_o/lp_n4_o (bit[2:0]) to control lane 4 status in software standby mode bit[2]: lp_dir_man4 0: input 1: output bit[1]: lp_p4_o bit[0]: lp_n4_o 0x484c mipi ctrl4c 0x02 rw mipi control 4c bit[7:4]: not used bit[3]: cklane_dis 0: enable, force clock lane to lp00 in software standby mode 1: disable bit[2]: vsub select 0: valid behind 1: valid in front bit[1:0]: input data valid (e.g., valid for yuv420) 01: valid = 1 10: valid = 2 11: valid = 3 table 7-16 mipi control registers (sheet 8 of 9) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x484d mipi ctrl4d 0xb6 rw bit[7:0]: test pattern data 0 0x484e mipi ctrl4e 0xb6 rw bit[7:0]: test pattern data 1 0x484f mipi ctrl4f 0xb6 rw bit[7:0]: test pattern data 2 0x4850~ 0x4859 not used ? ? not used 0x485a mipi ctrl5a 0xb6 rw bit[7:0]: test pattern data 3 0x485b mipi ctrl5b 0x01 rw bit[7:2]: not used bit[7:0]: test pattern data 4 0x485c mipi ctrl5c 0x3f rw bit[7]: not used bit[6]: debug mode bit[5]: mipi_slp_man_st mipi bus status manual control enable in sleep mode bit[4]: clk_lane_state 0: lp00 1: lp11 bit[3]: data_lane4_state 0: lp00 1: lp11 bit[2]: data_lane3_state 0: lp00 1: lp11 bit[1]: data_lane2_state 0: lp00 1: lp11 bit[0]: data_lane1_state 0: lp00 1: lp11 0x485d~ 0x485f not used ? ? not used table 7-16 mipi control registers (sheet 9 of 9) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-33 7.17 isp top [0x5000 ~ 0x5055] table 7-17 isp top registers (sheet 1 of 3) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5001 isp ctrl01 0x01 rw bit[7:1]: not used bit[0]: manual white balance (mwb) enable 0: disable 1: enable 0x5002 not used ? ? not used 0x5003 isp ctrl03 0x20 rw bit[7:6]: not used bit[5]: buffer control enable must be enabled if dpc or binning filter is used. 0: disable 1: enable bit[4:0]: not used 0x5004 isp ctrl04 0x0c rw bit[7:4]: not used bit[3]: debug mode bit[2:0]: not used 0x5005 isp ctrl05 0xdc rw bit[7:5]: not used bit[4]: mwb bias on 0: disable 1: enable bit[3:0]: not used 0x5006 isp ctrl06 0x11 rw bit[7:0]: debug mode 0x5007 isp ctrl07 0x50 rw bit[7:0]: debug mode 0x5008 isp ctrl08 0x0c rw bit[7:0]: debug mode 0x5009 isp ctrl09 0xfc rw bit[7:0]: debug mode 0x500a isp ctrl0a 0x11 rw bit[7:0]: debug mode 0x500b isp ctrl0b 0x40 rw bit[7:0]: debug mode 0x500c isp ctrl0c 0x0c rw bit[7:0]: debug mode color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x500d isp ctrl0d 0xf0 rw bit[7:0]: debug mode 0x500e isp ctrl0e 0x11 rw bit[7:0]: debug mode 0x500f isp ctrl0f 0x50 rw bit[7:0]: debug mode 0x5010 isp ctrl10 0x0c rw bit[7:0]: debug mode 0x5011 isp ctrl11 0xfc rw bit[7:0]: debug mode 0x5012~ 0x501e not used ? ? not used 0x501f isp ctrl1f 0x00 rw bit[7:6]: not used bit[5]: bypass isp 0: disable 1: enable bit[4:0]: debug mode 0x5020~ 0x5024 not used ? ? not used 0x5025 isp ctrl25 0x00 rw bit[7:4]: debug mode bit[3:2]: not used bit[1:0]: avg_sel 00: sensor raw 01: after lenc 10: after mwb gain 0x5026~ 0x5029 not used ? ? not used 0x502a isp ctrl2a 0x00 rw bit[7:4]: mux_pad_ctrl[3:0] bit[1]: debug mode bit[0]: not used 0x502b~ 0x503c not used ? ? not used 0x503d isp ctrl3d 0x08 rw bit[7:0]: debug mode 0x503e isp ctrl3e 0x00 rw bit[7:0]: debug mode 0x503f isp ctrl3f 0x20 rw bit[7:0]: debug mode 0x5040 not used ? ? not used table 7-17 isp top registers (sheet 2 of 3) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-35 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5042 not used ? ? not used 0x5043 isp ctrl43 0x08 rw bit[7:0]: debug mode 0x5044 isp ctrl44 0x00 rw bit[7:0]: debug mode 0x5045 isp ctrl45 0x00 rw bit[7:2]: debug mode bit[1:0]: not used 0x5046 isp ctrl46 0x00 rw bit[7:0]: debug mode 0x5047 isp ctrl47 0x00 rw bit[7:0]: debug mode 0x5048 isp ctrl48 0x10 rw bit[7:0]: debug mode 0x5049 isp ctrl49 0x00 rw bit[7:4]: not used bit[3:0]: debug mode 0x504a isp ctrl4a 0x00 rw bit[7:0]: debug mode 0x504b isp ctrl4b 0x00 rw bit[7:0]: debug mode 0x504c isp ctrl4c 0x00 rw bit[7:0]: debug mode 0x504d isp ctrl4d 0x00 rw bit[7:0]: debug mode 0x504e~ 0x5055 not used ? ? not used table 7-17 isp top registers (sheet 3 of 3) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.18 scale control [0x5041, 0x5600 ~ 0x5608] table 7-18 scale control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable, scale is auto enable when the output size is less than the input size 1: enable, scale is manually enabled or disabled, depending on register 0x5041[5] bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5600 scale ctrl00 0x00 rw bit[7:2]: not used bit[1:0]: scale horizontal factor[9:8] 0x5601 scale ctrl01 0x00 rw bit[7:0]: scale horizontal factor[7:0] 0x5602 scale ctrl02 0x00 rw bit[7:2]: not used bit[1:0]: scale vertical factor[9:8] 0x5603 scale ctrl03 0x00 rw bit[7:0]: scale vertical factor[7:0] 0x5604 scale ctrl04 0x01 rw bit[7:1]: not used bit[0]: scale auto enable 0: use manual scaling factor from registers 0x5600~0x5603 1: calculate the scaling factor from the input size and the output size set in registers 0x3800~0x380b 0x5068 hscale_ctrl 0x00 rw bit[7:6]: horizontal msb bit[5]: not used bit[4:0]: scale_ctrl0 0x506a vscale_ctrl 0x00 rw bit[7:6]: vertical msb bit[5]: not used bit[4:0]: scale_ctrl1 05.09.2012 product specification proprie tary to omnivision technologies 7-37 7.19 average control [0x5041, 0x5680 ~ 0x5688] 0x5605 scale ctrl05 ? r bit[7:0]: horizontal scale factor[15:8] 0x5606 scale ctrl06 ? r bit[7:0]: horizontal scale factor[7:0] 0x5607 scale ctrl07 ? r bit[7:5]: not used bit[4:0]: inverse vertical scale factor[4:0] 0x5608 scale ctrl08 ? r bit[7:5]: not used bit[4:0]: inverse horizontal scale factor[4:0] table 7-19 average control registers (sheet 1 of 2) address register name default value r/w description 0x5041 isp ctrl41 0x0c rw bit[7]: manual scaling select 0: disable 1: enable bit[6]: not used bit[5]: manual scaling enable 0: scaling disable 1: scaling enable bit[4]: post binning filter enable 0: disable 1: enable bit[3]: not used bit[2]: average enable 0: disable 1: enable bit[1:0]: not used 0x5680 avg ctrl00 0x00 rw bit[7:4]: not used bit[3:0]: x start offset[11:8] 0x5681 avg ctrl01 0x00 rw bit[7:0]: x start offset[7:0] 0x5682 avg ctrl02 0x00 rw bit[7:4]: not used bit[3:0]: y start offset[11:8] 0x5683 avg ctrl03 0x00 rw bit[7:0]: y start offset[7:0] 0x5684 avg ctrl04 0x10 rw bit[7:4]: not used bit[3:0]: window width[11:8] 0x5685 avg ctrl05 0xa0 rw bit[7:0]: window width[7:0] table 7-18 scale control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.20 dpc control [0x5000, 0x5780 ~ 0x5791] 0x5686 avg ctrl06 0x0c rw bit[7:4]: not used bit[3:0]: window height[11:8] 0x5687 avg ctrl07 0x78 rw bit[7:0]: window height[7:0] 0x5688 avg ctrl08 0x02 rw bit[7:2]: not used bit[1]: average option bit[0]: average size manual 0: disable, use isp pre-scale 1: enable, use registers 0x5680~0x5687 table 7-20 dpc control registers (sheet 1 of 2) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5780 dpc ctrl00 0x1c rw dpc control register 0x5781 dpc ctrl01 0x13 rw dpc control register 0x5782 dpc ctrl02 0x03 rw dpc control register 0x5783 dpc ctrl03 0x08 rw dpc control register 0x5784 dpc ctrl04 0x0c rw dpc control register 0x5785 dpc ctrl05 0x10 rw dpc control register 0x5786 dpc ctrl06 0x08 rw dpc control register 0x5787 dpc ctrl07 0x10 rw dpc control register 0x5788 dpc ctrl08 0x10 rw dpc control register table 7-19 average control registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-39 7.21 lenc control [0x5000, 0x5800 ~ 0x5856] 0x5789 dpc ctrl09 0x08 rw dpc control register 0x578a dpc ctrl0a 0x04 rw dpc control register 0x578b dpc ctrl0b 0x02 rw dpc control register 0x578c dpc ctrl0c 0x02 rw dpc control register 0x578d dpc ctrl0d 0x0c rw dpc control register 0x578e dpc ctrl0e 0x06 rw dpc control register 0x578f dpc ctrl0f 0x02 rw dpc control register 0x5790 dpc ctrl10 0x02 rw dpc control register 0x5791 dpc ctrl11 0xff rw dpc control register table 7-21 lenc registers (sheet 1 of 4) address register name default value r/w description 0x5000 isp ctrl00 0x86 rw bit[7]: lenc correction enable 0: disable 1: enable bit[6:3]: not used bit[2]: black pixel cancellation enable 0: disable 1: enable bit[1]: white pixel cancellation enable 0: disable 1: enable bit[0]: not used 0x5800 lenc ctrl00 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g00) 0x5801 lenc ctrl01 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g01) 0x5802 lenc ctrl02 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g02) table 7-20 dpc control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 0x5803 lenc ctrl03 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g03) 0x5804 lenc ctrl04 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g04) 0x5805 lenc ctrl05 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g05) 0x5806~ 0x580b lenc ctrl06~ lenc ctrl0b 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g10~g15) 0x580c~ 0x5811 lenc ctrl0c~ lenc ctrl11 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g20~25) 0x5812~ 0x5817 lenc ctrl12~ lenc ctrl17 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g30~35) 0x5818~ 0x581d lenc ctrl18~ lenc ctrl1d 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g40~g45) 0x581e~ 0x5823 lenc ctrl1e~ lenc ctrl23 0x00 rw bit[7:6]: not used bit[5:0]: magnitude of parameter of g channel matrix (g50~g55) 0x5824 lenc ctrl24 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b00) bit[3:0]: magnitude of parameter of r channel matrix (r00) 0x5825 lenc ctrl25 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b01) bit[3:0]: magnitude of parameter of r channel matrix (r01) 0x5826 lenc ctrl26 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b02) bit[3:0]: magnitude of parameter of r channel matrix (r02) 0x5827 lenc ctrl27 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b03) bit[3:0]: magnitude of parameter of r channel matrix (r03) table 7-21 lenc registers (sheet 2 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-41 0x5828 lenc ctrl28 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b04) bit[3:0]: magnitude of parameter of r channel matrix (r04) 0x5829~ 0x583c lenc ctrl29~ lenc ctrl3c 0x00 rw bit[7:4]: magnitude of parameter of b channel matrix (b10~b14, b20~b24, b30~b34, b40~b44) bit[3:0]: magnitude of parameter of r channel matrix (r10~r14, r20~r24, r30~r34, r40~r44) 0x583d lenc ctrl3d 0x88 rw bit[7:4]: lenc b offset bit[3:0]: lenc r offset 0x583e lenc ctrl3e 0x40 rw bit[7:0]: maximum gain 0x583f lenc ctrl3f 0x20 rw bit[7:0]: minimum gain 0x5840 lenc ctrl40 0x18 rw bit[7:0]: minimum q 0x5841 lenc ctrl41 0x0d rw bit[7:4]: not used bit[3]: enable add blc 0: disable 1: enable bit[2]: black level enable 0: disable 1: enable bit[1]: not used bit[0]: auto q enable 0: disable 1: enable 0x5842 lenc ctrl42 0x00 rw bit[7:3]: not used bit[2:0]: br_hscale[10:8] 0x5843 lenc ctrl43 0x99 rw bit[7:0]: br_hscale[7:0] 0x5844 lenc ctrl44 0x00 rw bit[7:3]: not used bit[2:0]: br_vscale[10:8] 0x5845 lenc ctrl45 0xcc rw bit[7:0]: br_vscale[7:0] 0x5846 lenc ctrl46 0x00 rw bit[7:3]: not used bit[2:0]: g_hscale[10:8] 0x5847 lenc ctrl47 0xcc rw bit[7:0]: g_hscale[7:0] 0x5848 lenc ctrl48 0x00 rw bit[7:3]: not used bit[2:0]: g_vscale[10:8] 0x5849 lenc ctrl49 0x88 rw bit[7:0]: g_vscale[7:0] 0x584a~ 0x584f not used ? ? not used table 7-21 lenc registers (sheet 3 of 4) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.22 pre blc [0x5c00 ~ 0x5c08] 0x5850 lenc ctrl50 ? r bit[7:2]: not used bit[1:0]: x_offset[9:8] 0x5851 lenc ctrl51 ? r bit[7:0]: x_offset[7:0] 0x5852 lenc ctrl52 ? r bit[7:2]: not used bit[1:0]: y_offset[9:8] 0x5853 lenc ctrl53 ? r bit[7:0]: y_offset[7:0] 0x5854 lenc ctrl54 ? r bit[7:6]: not used bit[5]: flip bit[4]: mirror bit[3:2]: y_skip bit[1:0]: x_skip 0x5855 lenc ctrl55 ? r bit[7:4]: not used bit[3]: overflow_gh bit[2]: overflow_brh bit[1]: overflow_gv bit[0]: overflow_brv 0x5856 lenc ctrl56 ? r bit[7]: not used bit[6:0]: m_nq[9:8] table 7-22 pre blc registers address register name default value r/w description 0x5c00 pblc ctrl00 0x80 rw pre blc control registers 0x5c01 pblc ctrl01 0x00 rw pre blc control registers 0x5c02 pblc ctrl02 0x00 rw pre blc control registers 0x5c03 pblc ctrl03 0x00 rw pre blc control registers 0x5c04 pblc ctrl04 0x00 rw pre blc control registers 0x5c05 pblc ctrl05 0x00 rw pre blc control registers 0x5c06 pblc ctrl06 0x00 rw pre blc control registers 0x5c07 pblc ctrl07 0x80 rw pre blc control registers 0x5c08 pblc ctrl08 0x10 rw pre blc control registers table 7-21 lenc registers (sheet 4 of 4) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-43 7.23 pre isp [0x5e00 ~ 0x5e11] table 7-23 pre isp registers (sheet 1 of 2) address register name default value r/w description 0x5e00 pre isp ctrl00 0x00 rw bit[7]: test enable bit[6]: rolling enable rolling bar in test mode bit[5]: transparent image + normal image enable bit[4]: test_squ square b&w enable bit[3:2]: color bar pattern select 00: normal color bar pattern 01: color bar pattern with vertical fading 10: color bar pattern with horizontal fading 11: color bar pattern with horizontal and vertical fading bit[1:0]: test_sel 0x5e01 pre isp ctrl01 0x41 rw bit[7]: not used bit[6]: win_cut enable bit[5]: isp_test low bits to 0 bit[4]: random random data reset bit[3:0]: random_seed 0x5e02 pre isp ctrl02 0x00 rw bit[7:0]: line number int[15:8] 0x5e03 pre isp ctrl03 0x01 rw bit[7:0]: line number int[7:0] 0x5e04 pre isp ctrl04 0x00 rw bit[7:0]: scale x input manual size[15:8] 0x5e05 pre isp ctrl05 0x00 rw bit[7:0]: scale x input manual size[7:0] 0x5e06 pre isp ctrl06 0x01 rw bit[7:0]: scale y input manual size[15:8] 0x5e07 pre isp ctrl07 0x00 rw bit[7:0]: scale y input manual size[7:0] 0x5e08 pre isp ctrl08 0x00 rw bit[7:0]: x manual offset[15:8] 0x5e09 pre isp ctrl09 0x00 rw bit[7:0]: x manual offset[7:0] 0x5e0a pre isp ctrl10 0x00 rw bit[7:0]: y manual offset[15:8] 0x5e0b pre isp ctrl11 0x01 rw bit[7:0]: y manual offset[7:0] 0x5e0c pre isp ctrl12 ? r bit[7:0]: pixel_number[15:8] 0x5e0d pre isp ctrl13 ? r bit[7:0]: pixel_number[7:0] color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.24 illumination control [0x6600 ~ 0x6611] 0x5e0e pre isp ctrl14 ? r bit[7:0]: line_number[15:8] 0x5e0f pre isp ctrl15 ? r bit[7:0]: line_number[7:0] 0x5e10 pre isp ctrl16 0x0c rw bit[7:6]: not used bit[5:2]: debug mode bit[1]: offset manual enable bit[0]: scale input size manual mode 0x5e11 pre isp ctrl17 0x00 rw bit[7:0]: debug mode table 7-24 illumination control registers (sheet 1 of 2) address register name default value r/w description 0x6600 illumination ctrl00 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly1 first pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6601 illumination ctrl01 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly2 second pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6602 illumination ctrl02 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly3 third pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6603 illumination ctrl03 0x10 rw bit[7:5]: not used bit[4:0]: pulse_dly4 fourth pulse delay 0~31 0x00: -0.5 frame 0x1f: 0.5 frame 0x6604 illumination ctrl04 0x11 rw bit[7:4]: second pulse duration (0~15 frames) bit[3:0]: first pulse duration (0~15 frames) table 7-23 pre isp registers (sheet 2 of 2) address register name default value r/w description 05.09.2012 product specification proprie tary to omnivision technologies 7-45 0x6605 illumination ctrl05 0x11 rw bit[7:4]: fourth pulse duration (0~15 frames) bit[3:0]: third pulse duration (0~15 frames) 0x6606 illumination ctrl06 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse1 (0~31) 0x6607 illumination ctrl07 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse2 (step) 0x6608 illumination ctrl08 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse3 (0~31) 0x6609 illumination ctrl09 0x1f rw bit[7:5]: not used bit[4:0]: duty_cycle_pulse4 (step) 0x660a illumination ctrl0a 0x00 rw bit[7:0]: gap1 between pulse0 and pulse1 (0~255 frames) 0x660b illumination ctrl0b 0x00 rw bit[7:0]: gap2 between pulse1 and pulse2 0x660c illumination ctrl0c 0x00 rw bit[7:0]: gap3 between pulse2 and pulse3 0x660d illumination ctrl0d 0x00 rw bit[7:0]: gap4 between pulse3 and pulse0 0x660e illumination ctrl0e 0x00 rw bit[7]: pwm_req bit[6]: not used bit[5]: illum_sel bit[4]: duty_no_map bit[3]: no_gap bit[2]: sel_slot_out bit[1]: manual duty cycle for d1 and d3 bit[0]: pwm_repeat 0x660f illumination ctrl0f 0x02 rw bit[7:4]: not used bit[3:0]: slot_width 0x6610 illumination ctrl10 0x01 rw bit[7:4]: not used bit[3:0]: ramp2_xstep_r second pulse duty cycle step 0x6611 illumination ctrl11 0x01 rw bit[7:4]: not used bit[3:0]: ramp4_xstep_r fourth pulse duty cycle step table 7-24 illumination control registers (sheet 2 of 2) address register name default value r/w description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 7.25 tpm control [0x6700 ~ 0x6721] 7.26 cadc [0x6900 ~ 0x6901] table 7-25 tpm registers address register name default value r/w description 0x6700~ 0x6705 tpm ctrl00~05 ? ? tpm control registers 0x6706 tpm ctrl06 0x78 rw bit[7]: debug mode bit[6:4]: db_period bit[3:0]: temp clock divisor sample clock = xvclk/clock divisor divisor = 1 if bit[3:0] = 0 sample clock must be around 3mhz 0x6707~ 0x670a tpm ctrl07~0a ? ? tpm control registers 0x670b tpm ctrl0b 0x00 rw bit[7]: trigger temperature sensor bit[6:0]: measured temperature (0c ~ 80c) 0x670c~ 0x6721 tpm ctrl0c~21 ? ? tpm control registers table 7-26 cadc registers address register name default value r/w description 0x6900 cadc ctrl00 0x61 rw cadc control registers 0x6901 cadc ctrl01 0x04 rw cadc control registers 05.09.2012 product specification proprie tary to omnivision technologies 8-1 8 operating specifications 8.1 absolute maximum ratings 8.2 functional temperature table 8-1 absolute maximum ratings parameter absolute maximum rating a a. exceeding the absolute maximum rati ngs shown above invalidates all ac and dc electrical specifications and may result in permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. ambient storage temperature -40c to +95c supply voltage (with respect to ground) v dd-a 4.5v v dd-d 3v v dd-io 4.5v electro-static discharge (esd) human body model 2000v machine model 200v all input/output voltages (with respect to ground) -0.3v to v dd-io + 1v i/o current on any input or output pin 200 ma table 8-2 functional temperature parameter range operating temperature a a. sensor functions but image quality may be noticeably different at temperatures outside of stable image range -30c to +70c junction temperature stable image temperature b b. image quality remains stable throughout this temperature range 0c to +50c junction temperature color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 8.3 dc characteristics table 8-3 dc characteristics (-30c < t j < 70c) symbol parameter min typ max unit supply v dd-a supply voltage (analog) 2.6 2.8 3.0 v v dd-d a a. using the internal regulator is strongly recommended for minimum power down currents supply voltage (digital core) 1.425 1.5 1.575 v v dd-io supply voltage (digital i/o) 1.7 1.8 3.0 v i dd-a active (operating) current b b. active current is based on sensor resolution at full size and full speed, with avdd = 2.8v and dovdd = 1.8v 70 85 ma i dd-io 90 110 ma i dds-sccb standby current c c. standby current is measured at room temperature 30 60 a i dds-pwdn 30 60 a digital inputs (typical conditions: av dd = 2.8v, dvdd = 1.5v, dovdd = 1.8v) v il input voltage low 0.54 v v ih input voltage high 1.26 v c in input capacitor 10 pf digital outputs (standard loading 25 pf) v oh output voltage high 1.62 v v ol output voltage low 0.18 v serial interface inputs v il d d. based on dovdd = 1.8v sioc and siod -0.5 0 0.54 v v ih d sioc and siod 1.28 1.8 3.0 v 05.09.2012 product specification proprie tary to omnivision technologies 8-3 8.4 timing characteristics 8.5 vcm characteristics table 8-4 timing characteristics symbol parameter min typ max unit oscillator and clock input f osc frequency (xvclk) 6 24 27 mhz t r , t f clock input rise/fall time 5 (10 a ) a. if using internal pll ns table 8-5 vcm characteristics parameter a a. avdd = 2.6 ~ 3.1v, rs = 3.3 ? , vvcm = avdd, temperature = -30 ~ 70c, vcm model as a r series with l where r = 26 ? and l = 680 uh condition min typ max unit power avdd, agnd 2.6 2.8 3.1 v power on time 10 s dc performance resolution 100 a/lsb 10 bits differential non-linearity (dnl) guaranteed monotonic -1 +1 lsb relative accuracy (inl) 1 lsb zero code error set all 10 bits low 0.2 ma output characteristics minimum output current 0.2 ma maximum output current 100 ma output power down current 4.5 a output current settling time test code changed from 1/4 fs to 3/4 fs 200 s color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 9-1 9 mechanical specifications 9.1 physical specifications figure 9-1 die specifications 6750 m 6350 m 275 m 275 m 200 m die center (0, 0) OV8825-cob (-3175, 3375) (3175, 3375) (3175, -3375) (-3175, -3375) 15 m 15 m 86 m 86 m all dimensions and coordinates are in m. note 1 15 1 60 46 16 45 8825_cob_ds_9_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 table 9-1 pad location coordinates (sheet 1 of 2) pad number pad name x coordinate y coordinate bond pad opening size 01 siod -100 3315 86x86 02 vsync -300 3315 86x86 03 frex -500 3315 86x86 04 shutter -700 3315 86x86 05 avdd -900 3315 86x86 06 agnd -1100 3315 86x86 07 strobe -1300 3315 86x86 08 resetb -1500 3315 86x86 09 pwdnb -1700 3315 86x86 10 tm -1900 3315 86x86 11 sgnd -2100 3315 86x86 12 dvdd -2300 3315 86x86 13 dgnd -2500 3315 86x86 14 avdd -2700 3315 86x86 15 agnd -2900 3315 86x86 16 agnd -2900 -3315 86x86 17 avdd -2700 -3315 86x86 18 dgnd -2500 -3315 86x86 19 dvdd -2300 -3315 86x86 20 egnd -2100 -3315 86x86 21 pvdd -1900 -3315 86x86 22 xvclk -1700 -3315 86x86 23 dovdd -1500 -3315 86x86 24 mdp2 -1300 -3315 86x86 25 mdn2 -1100 -3315 86x86 26 mdp0 -900 -3315 86x86 27 mdn0 -700 -3315 86x86 28 mcp -500 -3315 86x86 29 mcn -300 -3315 86x86 30 egnd -100 -3315 86x86 05.09.2012 product specification proprie tary to omnivision technologies 9-3 31 evdd 100 -3315 86x86 32 mdp1 300 -3315 86x86 33 mdn1 500 -3315 86x86 34 mdp3 700 -3315 86x86 35 mdn3 900 -3315 86x86 36 dvdd 1100 -3315 86x86 37 dgnd 1300 -3315 86x86 38 avdd 1500 -3315 86x86 39 agnd 1700 -3315 86x86 40 vsnk 1900 -3315 86x86 41 vsnk 2100 -3315 86x86 42 vgnd 2300 -3315 86x86 43 vgnd 2500 -3315 86x86 44 dvdd 2700 -3315 86x86 45 dgnd 2900 -3315 86x86 46 dgnd 2900 3315 86x86 47 dvdd 2700 3315 86x86 48 dovdd 2500 3315 86x86 49 dvdd 2300 3315 86x86 50 dovdd 2100 3315 86x86 51 dvdd 1900 3315 86x86 52 dovdd 1700 3315 86x86 53 agnd 1500 3315 86x86 54 avdd 1300 3315 86x86 55 dognd 1100 3315 86x86 56 vh 900 3315 86x86 57 vnh 700 3315 86x86 58 vnl 500 3315 86x86 59 agnd 300 3315 86x86 60 sioc 100 3315 86x86 table 9-1 pad location coordinates (sheet 2 of 2) pad number pad name x coordinate y coordinate bond pad opening size color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies 10-1 10 optical specifications 10.1 sensor array center figure 10-1 sensor array center 3444 m 4614 m top view note 1 note 2 this drawing is not to scale and is for reference only. as most optical assemblies invert and mirror the image, the chip is t yp icall y mounted with p ad 1 oriented down on the pcb. sensor array OV8825 array center (-450 m, 0 m) first pixel readout (-2757 m, 1722 m) package center (0 m, 0 m) 15 1 60 46 16 45 8825_cob_ds_10_1 color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 10.2 lens chief ray angle (cra) figure 10-2 chief ray angle (cra) table 10-1 cra versus image height plot (sheet 1 of 2) field (%) image height (mm) cra (degrees) 0.00 0.000 0.0 0.05 0.143 2.3 0.10 0.286 4.6 0.15 0.428 6.9 0.20 0.571 9.2 0.25 0.714 11.4 0.30 0.857 13.6 0.35 1.000 15.7 0.40 1.142 17.7 0.45 1.285 19.6 0.50 1.428 21.4 0.0 0.5 1.0 1.5 2.5 2.0 3.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 cra ima g e hei g ht (mm) chief ray angle() 8825_ds_10_2 05.09.2012 product specification proprie tary to omnivision technologies 10-3 0.55 1.571 23.0 0.6 1.714 24.4 0.65 1.856 25.5 0.70 1.999 26.3 0.75 2.142 26.8 0.80 2.285 27.0 0.85 2.428 27.0 0.90 2.570 26.9 0.95 2.713 26.7 1.00 2.856 26.3 table 10-1 cra versus image height plot (sheet 2 of 2) field (%) image height (mm) cra (degrees) color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies a-1 appendix a handling of rw devices a.1 esd /eos prevention 1. ensure that there is 500v esd control in all work areas. 2. use esd safety shoes, ground strap, and st atic control smocks in test areas. 3. use grounded work carts and t ables in inspection areas. 4. omnivision recommends the use of ionized air in all work areas. a.2 particles and cleanliness of environment 1. all production, inspection and packaging areas should meet class10 environment requirements. 2. use optical microscopes with 50x and 100x magnifications for particle inspection. 3. ensure that there is good cassette sealing for particle protection during storage. 4. omnivision recommends air blowing to remove removable particles. 5. rw die should be stored in nitrogen gas purged cabinets with temperature less than 30c and relative humidity of 60% before assembly. a.3 other requirements 1. reliability assurance of rw or cob bare die is certifi ed by product reliability of the bare die in a clcc, csp or qfp package form factor. precautions should be taken if the packaging form factor of the bare die is other than these specified. 2. avoid exposure to strong sunlight fo r extended periods of time as the co lor filter of the image sensor may become discolored. 3. avoid direct exposure of the sensor bare die to high temperature and/or humidity environment as sensor characteristics will be affected. extra precautions should be exercised if the bare die experiences temperatures exceeding 260c for more than 75 seconds. color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 05.09.2012 product specification proprie tary to omnivision technologies rev-1 revision history version 1.0 08.24.2011 ? initial release version 1.1 01.19.2012 ? changed omnibsi to omnibsi+ in all places ? in key specifications on page i, changed ac tive power requirements to 160 ma (358 mw) ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-a ) to 70 and 85, respectively ? in table 8-3, changed typ and max val ues for active (operating) current (i dd-io ) to 90 and 110, respectively ? changed figure 9-1 to show bond pad opening size of 86x86 ? in table 9-1, deleted x pitch and y pitch column s, changed last column name to "bond pad opening size" and changed bond pad size 150x70 to bond pad opening size 86x86 version 1.11 02.01.2012 ? in table 1-1, changed pad type for pads 12, 19, 31, 36, 44, 47, 49, and 51 to "power" ? in table 1-2, changed siod configuration for reset, after reset release, software standby, and hardware standby conditions to "open drain", "i/o", "i/o", and "open drain", respectively ? in table 1-2, changed vsync, frex, shutte r, and strobe configurations for reset and after reset release conditions to "high-z" ? in table 1-2, changed mdp2, mdn2, mdp0, mdn0, mdp1, mdn1, mdp3, and mdn3 configurations for after reset release condition to "high-z" ? in table 1-2, changed mcp and mcn configur ations for reset and after reset release conditions to "zero" and for software standby and hardware standby conditions to "zero by default (configurable)" version 1.2 03.13.2012 ? changed "i2c" to "sccb" throughout entire datasheet ? on page i, removed "...and mobile..." ? in section 2.1, updated second paragraph ? in section 2, updated figure 2-1and section descriptions for sections 2.5, 2.6, 2.7.1, 2.8, and 2.12 ? in section 2.3, updated section description from "...1/2/4..." to "a one, two, or four" ? in table 2-1, changed header description from "technology" to "methodology" ? in section 2.8.1, updated information for list numbers 3 and 7 ? in sub-section 2.8.2, updated information for list numbers 5 ? in section 2.9, updated second sentence of section description color cmos 8 megapixel (3264 x 2448) ima ge sensor with omnibsi+? technology OV8825 proprietary to omnivision technologi es product specification version 2.0 ? in section 3.2, updated section title and description ? in section 4.2, updated last sentence of section description ? in section 4.5, replaced first paragraph, added second paragraph, and subsections 4.5.1 and 4.5.2 ? in sub-section 4.10.1, changed "it" to "the ov 8825" in last sentence of section description ? in sub-section 4.10.2, updated section description ? in section 5, updated section descriptions for sections 5.1 and 5.3, and 5.6 ? in section 6.1 updated section description ? in table 6-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in table 7-1, changed bit description fo r register 0x0100[0] to "streaming..." ? in section 7.11, added "it is not recommended to change these register values." to section description version 2.0 05.09.2012 ? changed datasheet from preliminary specification to product specification the clear advantage? website: www.ovt.com omnivision technologies, inc. united states 4275 burton drive santa clara, ca 95054 tel: + 1 408 567 3000 fax: + 1 408 567 3001 email: salesamerican@ovt.com united kingdom hampshire + 44 1256 744 610 finland mouhij?rvi + 358 3 341 1898 germany munich +49 89 63 81 99 88 china beijing + 86 10 6580 1690 shanghai + 86 21 6175 9888 shenzhen + 86 755 8384 9733 hong kong + 852 2403 4011 japan tokyo + 81 3 5765 6321 korea seoul + 82 2 3478 2812 singapore + 65 6562 8250 taiwan taipei + 886 2 2657 9800 - ext.#100 |
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